On Fri, Aug 11, 2017 at 3:38 PM, Yogesh Narayan Gaur <yogeshnarayan.g...@nxp.com> wrote: > > >> -----Original Message----- >> From: Jagan Teki [mailto:jagannadh.t...@gmail.com] >> Sent: Friday, August 11, 2017 3:32 PM >> To: Yogesh Narayan Gaur <yogeshnarayan.g...@nxp.com> >> Cc: u-boot@lists.denx.de; York Sun <york....@nxp.com> >> Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support >> >> On Fri, Aug 11, 2017 at 3:30 PM, Yogesh Narayan Gaur >> <yogeshnarayan.g...@nxp.com> wrote: >> > >> > >> >> -----Original Message----- >> >> From: Jagan Teki [mailto:jagannadh.t...@gmail.com] >> >> Sent: Friday, August 11, 2017 3:25 PM >> >> To: Yogesh Narayan Gaur <yogeshnarayan.g...@nxp.com> >> >> Cc: u-boot@lists.denx.de; York Sun <york....@nxp.com> >> >> Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support >> >> >> >> On Tue, Aug 1, 2017 at 9:43 AM, Yogesh Gaur >> >> <yogeshnarayan.g...@nxp.com> >> >> wrote: >> >> > Add MT35XU512ABA1G12 parameters to NOR flash parameters array. >> >> > Since the manufactory ID is changed to 0x2C, add it for micron and >> >> > using it for relevant settings. >> >> > >> >> > The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It can't >> >> > support dual and quad. Supports subsector erase with 4KB >> >> > granularity, have support of FSR(flag status register) and flash size >> >> > is 64MB. >> >> > --- >> >> > drivers/mtd/spi/sf_internal.h | 1 + >> >> > drivers/mtd/spi/spi_flash.c | 2 ++ >> >> > drivers/mtd/spi/spi_flash_ids.c | 1 + >> >> > 3 files changed, 4 insertions(+) >> >> > >> >> > diff --git a/drivers/mtd/spi/sf_internal.h >> >> > b/drivers/mtd/spi/sf_internal.h index 839cdbe..f46cb3a 100644 >> >> > --- a/drivers/mtd/spi/sf_internal.h >> >> > +++ b/drivers/mtd/spi/sf_internal.h >> >> > @@ -33,6 +33,7 @@ enum spi_nor_option_flags { >> >> > /* CFI Manufacture ID's */ >> >> > #define SPI_FLASH_CFI_MFR_SPANSION 0x01 >> >> > #define SPI_FLASH_CFI_MFR_STMICRO 0x20 >> >> > +#define SPI_FLASH_CFI_MFR_MICRON 0x2C >> >> >> >> Does this new mfr id from micro? so 0x20 still exists? >> >> >> > On older Micron flash like MT25QU512ABB mfr id still is 0x20 but in newer >> flash, MT35X, it's been changed to 0x2c. >> >> OK, so the flash features like quad ennoblements, opcodes remains same? >> except the mfr? >> > This flash support single bit and octal bit cmds no dual or quad support. > Opcode for read/write/erase and other register operation related cmds are > similar to already supported flashes like MT25QU512ABB(n25q512a in existing > table). > Only mfr id has been modified.
OK. And better remove the new CONFIG_ macro since the both chips have equal functionalities and anyway changes should managed by id table. the chip you defined under STMICRO ifdef :) thanks! -- Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
