Hi Philipp,
I think this patch is not enough, pls drop this.
I have send another patch to add SPL_SYSRESET for all Rockchip SoCs,
because all of them need this, eg. rk3288 have many boards, all have
this issue.
Thanks,
- Kever
On 09/07/2017 04:53 PM, Dr. Philipp Tomsich wrote:
Kever,
I’ll try to get this in for the current release (i.e get it applied and send
out a pull
later this week), as it’s a defconfig-only bugfix for a regression introduced
in the
current release.
Regards,
Philipp.
On 7 Sep 2017, at 05:30, Kever Yang <kever.y...@rock-chips.com> wrote:
After the patch below, we need to add SPL_SYSRESET for do_reset()
in SPL:
87c16d4 drivers: spl: consistently use the $(SPL_TPL_) macro
Signed-off-by: Kever Yang <kever.y...@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
configs/firefly-rk3399_defconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index d8ea4cb..eead166 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -9,7 +9,6 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly"
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
-CONFIG_ENV_IS_IN_MMC=y
CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_STACK_R=y
@@ -36,6 +35,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent
assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
@@ -70,6 +70,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
--
1.9.1
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