On 24.11.2017 23:35, Simon Glass wrote: > Hi Simon, > > On 20 November 2017 at 22:38, Goldschmidt Simon > <sgoldschm...@de.pepperl-fuchs.com> wrote: >> Hi, >> >>> Simon Glass wrote: >>> On 10 November 2017 at 07:17, Goldschmidt Simon <sgoldschmidt@de.pepperl- >>> fuchs.com> wrote: >>>> This drops the limit that fpga is only loaded from FIT images for Xilinx. >>>> This is done by moving the 'partial' check from 'common/image.c' to >>>> 'drivers/fpga/xilinx.c' (the only driver supporting partial images >>>> yet) and supplies a weak default implementation in 'drivers/fpga/fpga.c'. >>>> >>>> Signed-off-by: Simon Goldschmidt <sgoldschm...@de.pepperl-fuchs.com> >>>> --- >>>> common/bootm.c | 2 +- >>>> common/image.c | 6 ++---- >>>> drivers/fpga/fpga.c | 9 +++++++++ >>>> drivers/fpga/xilinx.c | 13 +++++++++++++ >>>> include/fpga.h | 1 + >>>> 5 files changed, 26 insertions(+), 5 deletions(-) >>>> >>> >>> I think the FPGA subsystem should move to driver model. >> >> I can understand the need for that. However, I don't have the expertise >> to do so, I guess. Also, I would have thought this requirement would be >> raised to someone actually adding/changing fpga code (like the recent >> Intel activities on this list). >> >> In contrast to this, I see my patch more like cleaning the code, moving >> Xilinx dependent code from 'common/image.c' to 'drivers/fpga/xilinx.c'. >> This cleanup in the common directory is rather independent of migrating >> the fpga subsystem to driver model. > > I see that, although it is adding to the fpga header so presumably > making it harder for someone to move this over. > > Does anyone on cc know the plan fr conversion of FPGA to driver model? > It does not look too tricky from a quick look at the header file.
I am not aware about any plan for that and depends on time. Thanks, Michal _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot