Adds the register definition of the Display DPLL
Signed-off-by: Hannes Schmelzer <oe5...@oevsv.at>
---
arch/arm/include/asm/arch-am33xx/clock.h | 1 +
arch/arm/mach-omap2/am33xx/clock_am33xx.c | 7 +++++++
2 files changed, 8 insertions(+)
diff --git a/arch/arm/include/asm/arch-am33xx/clock.h
b/arch/arm/include/asm/arch-am33xx/clock.h
index 5399bb8..9dbcd3a 100644
--- a/arch/arm/include/asm/arch-am33xx/clock.h
+++ b/arch/arm/include/asm/arch-am33xx/clock.h
@@ -104,6 +104,7 @@ extern const struct dpll_regs dpll_mpu_regs;
extern const struct dpll_regs dpll_core_regs;
extern const struct dpll_regs dpll_per_regs;
extern const struct dpll_regs dpll_ddr_regs;
+extern const struct dpll_regs dpll_disp_regs;
extern const struct dpll_params dpll_mpu_opp[NUM_CRYSTAL_FREQ][NUM_OPPS];
extern const struct dpll_params dpll_core_1000MHz[NUM_CRYSTAL_FREQ];
extern const struct dpll_params dpll_per_192MHz[NUM_CRYSTAL_FREQ];
diff --git a/arch/arm/mach-omap2/am33xx/clock_am33xx.c
b/arch/arm/mach-omap2/am33xx/clock_am33xx.c
index 1780bbd..9ab4d25 100644
--- a/arch/arm/mach-omap2/am33xx/clock_am33xx.c
+++ b/arch/arm/mach-omap2/am33xx/clock_am33xx.c
@@ -52,6 +52,13 @@ const struct dpll_regs dpll_ddr_regs = {
.cm_div_m2_dpll = CM_WKUP + 0xA0,
};
+const struct dpll_regs dpll_disp_regs = {
+ .cm_clkmode_dpll = CM_WKUP + 0x98,
+ .cm_idlest_dpll = CM_WKUP + 0x48,
+ .cm_clksel_dpll = CM_WKUP + 0x54,
+ .cm_div_m2_dpll = CM_WKUP + 0xA4,
+};
+
struct dpll_params dpll_mpu_opp100 = {
CONFIG_SYS_MPUCLK, OSC-1, 1, -1, -1, -1, -1};
const struct dpll_params dpll_core_opp100 = {
--
2.7.4
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