The Ux500 variants of the pl011 have separate LCRH registers for RX and
TX. The TX register is at the same offset as the unmodified pl011, so
we need to additionally program only the RX register.
Acked-by: Michael Brandt <michael.bra...@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vinc...@stericsson.com>
---
I have used the style of the surrounding code here.
drivers/serial/serial_pl01x.c | 8 ++++++++
drivers/serial/serial_pl01x.h | 1 +
2 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index c645cef..c819f1d 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -144,6 +144,14 @@ int serial_init (void)
IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH,
(UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN));
+#ifdef CONFIG_UX500
+ /*
+ * On Ux500 variants, also set up the separate LCRH for RX.
+ */
+ IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH_RX,
+ (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN));
+#endif
+
/*
** Finally, enable the UART
*/
diff --git a/drivers/serial/serial_pl01x.h b/drivers/serial/serial_pl01x.h
index 5f20fdd..0ff6203 100644
--- a/drivers/serial/serial_pl01x.h
+++ b/drivers/serial/serial_pl01x.h
@@ -93,6 +93,7 @@
* PL011 definitions
*
*/
+#define UART_PL011_LCRH_RX 0x1C
#define UART_PL011_IBRD 0x24
#define UART_PL011_FBRD 0x28
#define UART_PL011_LCRH 0x2C
--
1.7.0
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
