Stefano Babic wrote: > Tom wrote: >> Stefano Babic wrote: >>> The lowlevel_init file contained some hard-coded values >>> to setup the RAM. These board related values are moved into >>> the board configuration file. >> Why was only one value cleaned up? >> Just from the patch, there are at least 4 more. > > Well, I prefer do not move a lot of configuration values inside the > board config file and add only what it is really needed and when it is > needed. > > The fixed values you have seen set the CCM in a known status before > updating it to the final value, and this procedure should be the same > for all boards, as I undestood from Freescale's doc. > > The patch adds configuration values to select the clock for DDR and the > value of the related divider, and both depends on the board implementation. > >>> + orr r1,r1,#CONFIG_SYS_DDR_CLKSEL > > I'll fix it, thanks. > >> git am complains about the leading space >> Please remove >>> str r1, [r0, #CLKCTL_CBCMR] >>> ldr r1, =0x13239145 >>> str r1, [r0, #CLKCTL_CBCDR] >>> @@ -171,6 +172,7 @@ >>> ldr r1, =0x19239145 >>> str r1, [r0, #CLKCTL_CBCDR] >>> ldr r1, =0x000020C0 >>> + orr r1,r1,#CONFIG_SYS_DDR_CLKSEL >> This is a noop as it is defined as 0. >> Is the value going to change ? > > That is correct. The value selects which clock must be used for the DDR. > On the mx51evk, this value must be set to 0. However, I know already > another target that uses another clock source for the RAM. >
That is a good reason. Just a cleanup is needed Tom > Stefano > _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot