On Mär 06 2019, Anup Patel <anup.pa...@wdc.com> wrote: >> -----Original Message----- >> From: Andreas Schwab <sch...@suse.de> >> Sent: Wednesday, March 6, 2019 4:27 PM >> To: Anup Patel <anup.pa...@wdc.com> >> Cc: Auer, Lukas <lukas.a...@aisec.fraunhofer.de>; u-boot@lists.denx.de; >> paul.walms...@sifive.com; ag...@suse.de; a...@brainfault.org; >> bar...@tkos.co.il; daniel.schwierz...@gmail.com; bmeng...@gmail.com; >> r...@andestech.com; s...@denx.de; pal...@sifive.com; Atish Patra >> <atish.pa...@wdc.com> >> Subject: Re: [PATCH v2 0/9] SMP support for RISC-V >> >> Apparently sometimes u-boot tries to boot the kernel on heart 0 (the E51 >> core), which will then fail to start userspace, since that cannot cope with >> the >> missing fpu. > > That's not possible
Yes, it is. OpenSBI v0.3 (Mar 6 2019 10:55:01) ____ _____ ____ _____ / __ \ / ____| _ \_ _| | | | |_ __ ___ _ __ | (___ | |_) || | | | | | '_ \ / _ \ '_ \ \___ \| _ < | | | |__| | |_) | __/ | | |____) | |_) || |_ \____/| .__/ \___|_| |_|_____/|____/_____| | | |_| Platform Name : SiFive Freedom U540 Platform HART Features : RV64ACDFIMSU Platform Max HARTs : 5 Current Hart : 2 Firmware Base : 0x80000000 Firmware Size : 88 KB Runtime SBI Version : 0.1 PMP0: 0x0000000080000000-0x000000008001ffff (A) PMP1: 0x0000000000000000-0x0000007fffffffff (A,R,W,X) U-Boot 2019.04-rc3-00010-g3ea5582c09 (Mar 06 2019 - 10:06:10 +0100) CPU: rv64imac Model: sifive,hifive-unleashed-a00 DRAM: 8 GiB Andreas. -- Andreas Schwab, SUSE Labs, sch...@suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 "And now for something completely different." _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot