Enable DM GPIO support on iMX53 M53Menlo and fix up board code where
applicable. Enable MALLOC_F to let the GPIO controllers bind early on.

Signed-off-by: Marek Vasut <ma...@denx.de>
Cc: Fabio Estevam <fabio.este...@nxp.com>
Cc: Stefano Babic <sba...@denx.de>
---
 board/menlo/m53menlo/m53menlo.c | 8 ++++++++
 configs/m53menlo_defconfig      | 4 ++++
 2 files changed, 12 insertions(+)

diff --git a/board/menlo/m53menlo/m53menlo.c b/board/menlo/m53menlo/m53menlo.c
index 6bdd6d5b23..a46041868c 100644
--- a/board/menlo/m53menlo/m53menlo.c
+++ b/board/menlo/m53menlo/m53menlo.c
@@ -88,6 +88,7 @@ int board_ehci_hcd_init(int port)
                imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX53_PAD_GPIO_4__GPIO1_4,
                                                    PAD_CTL_PKE |
                                                    PAD_CTL_DSE_HIGH));
+               gpio_request(IMX_GPIO_NR(1, 4), "USB_OTG_PWRON");
                gpio_direction_output(IMX_GPIO_NR(1, 4), 0);
 
                /* USB OTG Over Current */
@@ -97,6 +98,7 @@ int board_ehci_hcd_init(int port)
                imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX53_PAD_GPIO_2__GPIO1_2,
                                                    PAD_CTL_PKE |
                                                    PAD_CTL_DSE_HIGH));
+               gpio_request(IMX_GPIO_NR(1, 2), "USB_HOST_PWRON");
                gpio_direction_output(IMX_GPIO_NR(1, 2), 0);
 
                /* USB Host Over Current */
@@ -215,6 +217,8 @@ static void enable_lvds_clock(struct display_info_t const 
*dev, const u8 hclk)
 
 static void enable_lvds_etm0430g0dh6(struct display_info_t const *dev)
 {
+       gpio_request(IMX_GPIO_NR(6, 0), "LCD");
+
        /* For ETM0430G0DH6 model, this must be enabled before the clock. */
        gpio_direction_output(IMX_GPIO_NR(6, 0), 1);
 
@@ -227,6 +231,8 @@ static void enable_lvds_etm0430g0dh6(struct display_info_t 
const *dev)
 
 static void enable_lvds_etm0700g0dh6(struct display_info_t const *dev)
 {
+       gpio_request(IMX_GPIO_NR(6, 0), "LCD");
+
        /*
         * Set LVDS clock to 33.28 MHz for the display. The PLL4 is set to
         * 233 MHz, divided by 7 by setting CCM_CSCMR2 LDB_DI0_IPU_DIV=1 .
@@ -424,6 +430,8 @@ static void m53_set_clock(void)
        const u32 dramclk = 400;
        u32 cpuclk;
 
+       gpio_request(IMX_GPIO_NR(4, 0), "CPUCLK");
+
        imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX53_PAD_GPIO_10__GPIO4_0,
                                            PAD_CTL_DSE_HIGH | PAD_CTL_PKE));
        gpio_direction_input(IMX_GPIO_NR(4, 0));
diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig
index ef57fbea91..3b527b9fdc 100644
--- a/configs/m53menlo_defconfig
+++ b/configs/m53menlo_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x71000000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_TARGET_M53MENLO=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
@@ -29,6 +30,7 @@ CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND_TRIMFFS=y
@@ -51,9 +53,11 @@ CONFIG_CMD_UBI=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="imx53-m53menlo"
 CONFIG_ENV_IS_IN_NAND=y
+CONFIG_DM=y
 CONFIG_BOOTCOUNT_LIMIT=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
 CONFIG_SYS_BOOTCOUNT_MAGIC=0x0B01C041
+CONFIG_DM_GPIO=y
 CONFIG_FSL_ESDHC=y
 CONFIG_NAND=y
 CONFIG_NAND_MXC=y
-- 
2.20.1

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