> Subject: Re: [PATCH 22/22] imx: Add i.MX8MM EVK board support.
>
> On 09.08.19 06:15, Peng Fan wrote:
> > Add board and SoC dts
> > Add ddr training code
> > support SD/MMC/GPIO/PINCTRL/UART
> >
> > Signed-off-by: Peng Fan <peng....@nxp.com>
> > ---
> > arch/arm/dts/Makefile | 3 +-
[....]
> > +}
> > +#endif
> > +
> > +int dram_init(void)
> > +{
> > + /* rom_pointer[1] contains the size of TEE occupies */
> > + if (rom_pointer[1])
> > + gd->ram_size = PHYS_SDRAM_SIZE - rom_pointer[1];
> > + else
>
> The above case should be guarded with "#ifdef CONFIG_OPTEE", because if
> OPTEE is not used, rom_pointer[1] does not always seem to be zero.
If OPTEE is not used, ATF will leave those registers as zero, so it will be
zero.
>
> > + gd->ram_size = PHYS_SDRAM_SIZE;
> > +
> > + return 0;
> > +}
> > +
[...]
> > +CONFIG_SPL_LOAD_FIT=y
> > +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
>
> For my custom i.MX8MM board I also use mkimage_fit_atf.sh, but I have done
> three modifications and I'm wondering how you are using the unmodified
> version.
>
> 1. It sets ATF_LOAD_ADDR="0x910000", but in imx-atf the BL31_BASE for
> i.MX8MM is set to 0x920000. How to handle this mismatch for i.MX8M and
> i.MX8MM?
I have added README in patchset, need export ATF_LOAD_ADDR=0x920000
>
> 2. For the 'images' section of the its file, I added 'os = "u-boot";' to the
> 'uboot@1' section and "os = 'arm-trusted-firmware";' to the 'atf@1'
> section. Without this SPL does not detect the binaries from the FIT image
> correctly.
Thanks for the fix.
>
> 3. In the 'config' section of the its file, I swapped the atf and uboot
> entries, so
> the atf binary is loaded as "firmware" and the u-boot binary as "loadable".
> Together with the change above (2) this leads to SPL code using the correct
> boot path as inteded by the code.
Thanks for the fix.
>
> > +CONFIG_OF_BOARD_SETUP=y
> > +CONFIG_OF_SYSTEM_SETUP=y
> >
> +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m
> /imximage-8mm-lpddr4.cfg"
> > +CONFIG_DEFAULT_FDT_FILE="fsl-imx8mm-evk.dtb"
> > +CONFIG_BOARD_LATE_INIT=y
> > +CONFIG_BOARD_EARLY_INIT_F=y
> > +CONFIG_SPL_TEXT_BASE=0x7E1000
> > +CONFIG_SPL_BOARD_INIT=y
> > +CONFIG_SPL_SEPARATE_BSS=y
> > +CONFIG_SPL_I2C_SUPPORT=y
> > +CONFIG_HUSH_PARSER=y
> > +CONFIG_SYS_PROMPT="u-boot=> "
> > +# CONFIG_CMD_EXPORTENV is not set
> > +# CONFIG_CMD_IMPORTENV is not set
> > +# CONFIG_CMD_CRC32 is not set
> > +CONFIG_CMD_CLK=y
> > +CONFIG_CMD_FUSE=y
> > +CONFIG_CMD_GPIO=y
> > +CONFIG_CMD_I2C=y
> > +CONFIG_CMD_MMC=y
> > +CONFIG_CMD_CACHE=y
> > +CONFIG_CMD_REGULATOR=y
> > +CONFIG_CMD_EXT2=y
> > +CONFIG_CMD_EXT4=y
> > +CONFIG_CMD_EXT4_WRITE=y
> > +CONFIG_CMD_FAT=y
> > +CONFIG_OF_CONTROL=y
> > +CONFIG_SPL_OF_CONTROL=y
> > +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-evk"
> > +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
> > +CONFIG_SPL_DM=y
> > +CONFIG_SPL_CLK_COMPOSITE_CCF=y
> > +CONFIG_CLK_COMPOSITE_CCF=y
> > +CONFIG_SPL_CLK_IMX8MM=y
> > +CONFIG_CLK_IMX8MM=y
> > +CONFIG_DM_GPIO=y
> > +CONFIG_MXC_GPIO=y
> > +CONFIG_DM_I2C=y
> > +CONFIG_SYS_I2C_MXC=y
> > +CONFIG_SYS_I2C_MXC_I2C1=y
> > +CONFIG_SYS_I2C_MXC_I2C2=y
> > +CONFIG_SYS_I2C_MXC_I2C3=y
> > +CONFIG_DM_MMC=y
> > +CONFIG_SUPPORT_EMMC_BOOT=y
> > +CONFIG_FSL_ESDHC_IMX=y
> > +CONFIG_PHYLIB=y
> > +CONFIG_DM_ETH=y
> > +CONFIG_PINCTRL=y
> > +CONFIG_SPL_PINCTRL=y
> > +CONFIG_PINCTRL_IMX8M=y
> > +CONFIG_DM_REGULATOR=y
> > +CONFIG_DM_REGULATOR_FIXED=y
> > +CONFIG_DM_REGULATOR_GPIO=y
> > +CONFIG_MXC_UART=y
> > +CONFIG_DM_THERMAL=y
> > diff --git a/include/configs/imx8mm_evk.h
> > b/include/configs/imx8mm_evk.h new file mode 100644 index
> > 0000000000..cc63c44782
> > --- /dev/null
> > +++ b/include/configs/imx8mm_evk.h
> > @@ -0,0 +1,164 @@
> > +/* SPDX-License-Identifier: GPL-2.0+ */
> > +/*
> > + * Copyright 2018 NXP
> > + */
> > +
> > +#ifndef __IMX8MM_EVK_H
> > +#define __IMX8MM_EVK_H
> > +
> > +#include <linux/sizes.h>
> > +#include <asm/arch/imx-regs.h>
> > +
> > +#ifdef CONFIG_SECURE_BOOT
> > +#define CONFIG_CSF_SIZE 0x2000 /* 8K region */
> > +#endif
> > +
> > +#define CONFIG_SPL_MAX_SIZE (148 * 1024)
> > +#define CONFIG_SYS_MONITOR_LEN SZ_512K
> > +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
> > +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
> > +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
> > +#define CONFIG_SYS_UBOOT_BASE \
> > + (QSPI0_AMBA_BASE +
> CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
> > +
> > +#ifdef CONFIG_SPL_BUILD
> > +/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
> > +#define CONFIG_SPL_WATCHDOG_SUPPORT
> > +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT #define
> > +CONFIG_SPL_POWER_SUPPORT
> > +#define CONFIG_SPL_LDSCRIPT
> "arch/arm/cpu/armv8/u-boot-spl.lds"
> > +#define CONFIG_SPL_STACK 0x91fff0
> > +#define CONFIG_SPL_BSS_START_ADDR 0x00910000
>
> Nitpick: Remove the leading zeros from this address.
Will fix.
Thanks,
Peng.
>
> > +#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
> > +#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
> > +#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */
> > +#define CONFIG_SYS_ICACHE_OFF
> > +#define CONFIG_SYS_DCACHE_OFF
> > +
> > +/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
> > +#define CONFIG_MALLOC_F_ADDR 0x930000
> > +/* For RAW image gives a error info not panic */ #define
> > +CONFIG_SPL_ABORT_ON_RAW_IMAGE
> > +
> > +#endif
> > +
> > +#define CONFIG_REMAKE_ELF
> > +
> > +#define CONFIG_BOARD_POSTCLK_INIT
> > +
> > +/* Initial environment variables */
> > +#define CONFIG_EXTRA_ENV_SETTINGS \
> > + "script=boot.scr\0" \
> > + "image=Image\0" \
> > + "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
> > + "fdt_addr=0x43000000\0" \
> > + "fdt_high=0xffffffffffffffff\0" \
> > + "boot_fdt=try\0" \
> > + "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
> > + "initrd_addr=0x43800000\0" \
> > + "initrd_high=0xffffffffffffffff\0" \
> > + "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
> > + "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
> > + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
> > + "mmcautodetect=yes\0" \
> > + "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
> > + "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}
> ${script};\0" \
> > + "bootscript=echo Running bootscript from mmc ...; " \
> > + "source\0" \
> > + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}
> ${image}\0" \
> > + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0"
> \
> > + "mmcboot=echo Booting from mmc ...; " \
> > + "run mmcargs; " \
> > + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
> > + "if run loadfdt; then " \
> > + "booti ${loadaddr} - ${fdt_addr}; " \
> > + "else " \
> > + "echo WARN: Cannot load the DT; " \
> > + "fi; " \
> > + "else " \
> > + "echo wait for boot; " \
> > + "fi;\0" \
> > + "netargs=setenv bootargs console=${console} " \
> > + "root=/dev/nfs " \
> > + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
> > + "netboot=echo Booting from net ...; " \
> > + "run netargs; " \
> > + "if test ${ip_dyn} = yes; then " \
> > + "setenv get_cmd dhcp; " \
> > + "else " \
> > + "setenv get_cmd tftp; " \
> > + "fi; " \
> > + "${get_cmd} ${loadaddr} ${image}; " \
> > + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
> > + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
> > + "booti ${loadaddr} - ${fdt_addr}; " \
> > + "else " \
> > + "echo WARN: Cannot load the DT; " \
> > + "fi; " \
> > + "else " \
> > + "booti; " \
> > + "fi;\0"
> > +
> > +#define CONFIG_BOOTCOMMAND \
> > + "mmc dev ${mmcdev}; if mmc rescan; then " \
> > + "if run loadbootscript; then " \
> > + "run bootscript; " \
> > + "else " \
> > + "if run loadimage; then " \
> > + "run mmcboot; " \
> > + "else run netboot; " \
> > + "fi; " \
> > + "fi; " \
> > + "else booti ${loadaddr} - ${fdt_addr}; fi"
> > +
> > +/* Link Definitions */
> > +#define CONFIG_LOADADDR 0x40480000
> > +
> > +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
> > +
> > +#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
> > +#define CONFIG_SYS_INIT_RAM_SIZE 0x200000
> > +#define CONFIG_SYS_INIT_SP_OFFSET \
> > + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define
> > +CONFIG_SYS_INIT_SP_ADDR \
> > + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
> > +
> > +#define CONFIG_ENV_OVERWRITE
> > +#if defined(CONFIG_ENV_IS_IN_MMC)
> > +#define CONFIG_ENV_OFFSET (64 * SZ_64K)
> > +#endif
> > +#define CONFIG_ENV_SIZE 0x1000
> > +#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */
> > +#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2
> */
> > +
> > +/* Size of malloc() pool */
> > +#define CONFIG_SYS_MALLOC_LEN SZ_32M
> > +
> > +#define CONFIG_SYS_SDRAM_BASE 0x40000000
> > +#define PHYS_SDRAM 0x40000000
> > +#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
> > +
> > +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
> > +#define CONFIG_SYS_MEMTEST_END
> (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
> > +
> > +#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
> > +
> > +/* Monitor Command Prompt */
> > +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
> > +#define CONFIG_SYS_CBSIZE 2048
> > +#define CONFIG_SYS_MAXARGS 64
> > +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
> > +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
> > + sizeof(CONFIG_SYS_PROMPT) + 16)
> > +
> > +/* USDHC */
> > +#define CONFIG_FSL_USDHC
> > +
> > +#define CONFIG_SYS_FSL_USDHC_NUM 2
> > +#define CONFIG_SYS_FSL_ESDHC_ADDR 0
> > +
> > +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
> > +
> > +#define CONFIG_SYS_I2C_SPEED 100000
> > +
> > +#endif
> >
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