Hi Lukasz,

On 12/8/19 3:58 PM, Lukasz Majewski wrote:
On Wed,  4 Dec 2019 18:44:34 +0100
Giulio Benetti <giulio.bene...@benettiengineering.com> wrote:

Add i.MXRT compatible string and cpu type support to lpuart driver,
to use little endian 32 bits configurations.

Also according to RM, the Receive RX FIFO Enable (RXFE) field in
LPUART FIFO register is bit 3, so this definition should change to
0x08 as done for i.MX8. It needs also to set baudrate the same way as
i.MX8 does.

Signed-off-by: Giulio Benetti <giulio.bene...@benettiengineering.com>
---
  drivers/serial/serial_lpuart.c | 15 +++++++++++----
  include/fsl_lpuart.h           |  3 ++-
  2 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/serial/serial_lpuart.c
b/drivers/serial/serial_lpuart.c index 52bd2baf7d..2ac4c6d56a 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -49,7 +49,7 @@
  #define FIFO_RXSIZE_MASK      0x7
  #define FIFO_RXSIZE_OFF       0
  #define FIFO_TXFE             0x80
-#ifdef CONFIG_ARCH_IMX8
+#if defined(CONFIG_ARCH_IMX8) || defined(CONFIG_ARCH_IMXRT)
  #define FIFO_RXFE             0x08
  #else
  #define FIFO_RXFE             0x40
@@ -67,7 +67,8 @@ enum lpuart_devtype {
        DEV_VF610 = 1,
        DEV_LS1021A,
        DEV_MX7ULP,
-       DEV_IMX8
+       DEV_IMX8,
+       DEV_IMXRT,
  };
struct lpuart_serial_platdata {
@@ -409,7 +410,8 @@ static int _lpuart32_serial_init(struct udevice
*dev)
        lpuart_write32(plat->flags, &base->match, 0);
- if (plat->devtype == DEV_MX7ULP || plat->devtype ==
DEV_IMX8) {
+       if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8
||
+           plat->devtype == DEV_IMXRT) {
                _lpuart32_serial_setbrg_7ulp(dev, gd->baudrate);
        } else {
                /* provide data bits, parity, stop bit, etc */
@@ -426,7 +428,8 @@ static int lpuart_serial_setbrg(struct udevice
*dev, int baudrate) struct lpuart_serial_platdata *plat =
dev_get_platdata(dev);
        if (is_lpuart32(dev)) {
-               if (plat->devtype == DEV_MX7ULP || plat->devtype ==
DEV_IMX8)
+               if (plat->devtype == DEV_MX7ULP || plat->devtype ==
DEV_IMX8 ||
+                   plat->devtype == DEV_IMXRT)
                        _lpuart32_serial_setbrg_7ulp(dev, baudrate);
                else
                        _lpuart32_serial_setbrg(dev, baudrate);
@@ -527,6 +530,8 @@ static int
lpuart_serial_ofdata_to_platdata(struct udevice *dev) plat->devtype =
DEV_VF610; else if (!fdt_node_check_compatible(blob, node,
"fsl,imx8qm-lpuart")) plat->devtype = DEV_IMX8;
+       else if (!fdt_node_check_compatible(blob, node,
"fsl,imxrt-lpuart"))
+               plat->devtype = DEV_IMXRT;
return 0;
  }
@@ -546,6 +551,8 @@ static const struct udevice_id
lpuart_serial_ids[] = { { .compatible = "fsl,vf610-lpuart"},
        { .compatible = "fsl,imx8qm-lpuart",
                .data = LPUART_FLAG_REGMAP_32BIT_REG },
+       { .compatible = "fsl,imxrt-lpuart",
+               .data = LPUART_FLAG_REGMAP_32BIT_REG },
        { }
  };
diff --git a/include/fsl_lpuart.h b/include/fsl_lpuart.h
index fc517d4b7f..511fb84367 100644
--- a/include/fsl_lpuart.h
+++ b/include/fsl_lpuart.h
@@ -4,7 +4,8 @@
   *
   */
-#if defined(CONFIG_ARCH_MX7ULP) || defined(CONFIG_ARCH_IMX8)
+#if defined(CONFIG_ARCH_MX7ULP) || defined(CONFIG_ARCH_IMX8) || \
+       defined(CONFIG_ARCH_IMXRT)
  struct lpuart_fsl_reg32 {
        u32 verid;
        u32 param;

Please also used buildman to check if this patch series is bisectable
(i.e. if it can be build without errors for each separate commit).

For example:
./tools/buildman/buildman.py --branch=HEAD  odroid edison trats trats2
--show_errors --force-build --count=4 --output-dir=../BUILD/


And indeed patch[19/20] is not bisectable and need rework.
Thanks for pointing me buildman, very cool script!

Best regards
--
Giulio Benetti
Benetti Engineering sas



Best regards,

Lukasz Majewski

--

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