Introduce the QorIQ DPAA 1 Frame Manager nodes in the T1024RDB
device tree. The device tree fragments are copied over with little
modification from the Linux kernel source code.

Signed-off-by: Madalin Bucur <madalin.bu...@oss.nxp.com>
---
 arch/powerpc/dts/t1024rdb.dts | 54 ++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 53 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/dts/t1024rdb.dts b/arch/powerpc/dts/t1024rdb.dts
index 19a6652..32aaa4a 100644
--- a/arch/powerpc/dts/t1024rdb.dts
+++ b/arch/powerpc/dts/t1024rdb.dts
@@ -3,7 +3,7 @@
  * T1024RDB Device Tree Source
  *
  * Copyright 2013 - 2015 Freescale Semiconductor Inc.
- * Copyright 2019 NXP
+ * Copyright 2019-2020 NXP
  */
 
 /include/ "t102x.dtsi"
@@ -14,4 +14,56 @@
        #address-cells = <2>;
        #size-cells = <2>;
        interrupt-parent = <&mpic>;
+
+       aliases {
+               sg_2500_aqr105_phy4 = &sg_2500_aqr105_phy4;
+       };
+
+       soc: soc@ffe000000 {
+               ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+               reg = <0xf 0xfe000000 0 0x00001000>;
+
+               fman@400000 {
+                       fm1mac1: ethernet@e0000 {
+                               phy-handle = <&xg_aqr105_phy3>;
+                               phy-connection-type = "xgmii";
+                       };
+
+                       fm1mac2: ethernet@e2000 {
+                       };
+
+                       fm1mac3: ethernet@e4000 {
+                               phy-handle = <&rgmii_phy2>;
+                               phy-connection-type = "rgmii";
+                       };
+
+                       fm1mac4: ethernet@e6000 {
+                               phy-handle = <&rgmii_phy1>;
+                               phy-connection-type = "rgmii";
+                       };
+
+                       mdio0: mdio@fc000 {
+                               rgmii_phy1: ethernet-phy@2 {
+                                       reg = <0x2>;
+                               };
+                               rgmii_phy2: ethernet-phy@6 {
+                                       reg = <0x6>;
+                               };
+                       };
+
+                       xmdio0: mdio@fd000 {
+                               xg_aqr105_phy3: ethernet-phy@1 {
+                                       compatible = 
"ethernet-phy-ieee802.3-c45";
+                                       reg = <0x1>;
+                               };
+                               sg_2500_aqr105_phy4: ethernet-phy@2 {
+                                       compatible = 
"ethernet-phy-ieee802.3-c45";
+                                       reg = <0x2>;
+                               };
+                       };
+               };
+       };
+
 };
+
+#include "t1024si-post.dtsi"
-- 
2.1.0

Reply via email to