From: Franck LENORMAND <franck.lenorm...@nxp.com>
Signed-off-by: Franck LENORMAND <franck.lenorm...@nxp.com>
Signed-off-by: Peng Fan <peng....@nxp.com>
---
arch/arm/Kconfig | 3 +++
arch/arm/include/asm/arch-mx7ulp/imx-regs.h | 12 ++++++++++++
arch/arm/mach-imx/mx7ulp/Kconfig | 1 +
drivers/crypto/fsl/jobdesc.c | 2 +-
include/fsl_sec.h | 8 ++++----
5 files changed, 21 insertions(+), 5 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3307f2b3fc..70b9ad5b9f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -875,6 +875,9 @@ config ARCH_MX31
config ARCH_MX7ULP
bool "NXP MX7ULP"
select CPU_V7A
+ select SYS_FSL_HAS_SEC if IMX_HAB
+ select SYS_FSL_SEC_COMPAT_4
+ select SYS_FSL_SEC_LE
select ROM_UNIFIED_SECTIONS
imply MXC_GPIO
imply SYS_THUMB_BUILD
diff --git a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h
b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h
index 9a420dc30b..cb0c2c15c0 100644
--- a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h
@@ -16,6 +16,8 @@
#define CAAM_SEC_SRAM_SIZE (SZ_32K)
#define CAAM_SEC_SRAM_END (CAAM_SEC_SRAM_BASE + CAAM_SEC_SRAM_SIZE - 1)
+#define CAAM_ARB_BASE_ADDR CAAM_SEC_SRAM_BASE
+
#define OCRAM_0_BASE (0x2F000000)
#define OCRAM_0_SIZE (SZ_128K)
#define OCRAM_0_END (OCRAM_0_BASE + OCRAM_0_SIZE - 1)
@@ -224,6 +226,16 @@
#define IOMUXC_DDR_RBASE ((AIPS3_BASE + (AIPS3_SLOT_SIZE *
IOMUXC_DDR_AIPS3_SLOT)))
#define MMDC0_PCC_REG (PCC3_RBASE + (4 * MMDC0_PCC3_SLOT))
+#define CAAM_IPS_BASE_ADDR (AIPS2_BASE + 0x240000) /* 40240000 */
+
+#define CONFIG_SYS_FSL_SEC_OFFSET 0
+#define CONFIG_SYS_FSL_SEC_ADDR (CAAM_IPS_BASE_ADDR + \
+ CONFIG_SYS_FSL_SEC_OFFSET)
+#define CONFIG_SYS_FSL_JR0_OFFSET 0x1000
+#define CONFIG_SYS_FSL_JR0_ADDR (CONFIG_SYS_FSL_SEC_ADDR + \
+ CONFIG_SYS_FSL_JR0_OFFSET)
+#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
+
#define IOMUXC_DPCR_DDR_DQS0 ((IOMUXC_DDR_RBASE + (4 * 32)))
#define IOMUXC_DPCR_DDR_DQS1 ((IOMUXC_DDR_RBASE + (4 * 33)))
#define IOMUXC_DPCR_DDR_DQS2 ((IOMUXC_DDR_RBASE + (4 * 34)))
diff --git a/arch/arm/mach-imx/mx7ulp/Kconfig b/arch/arm/mach-imx/mx7ulp/Kconfig
index 6680f856c5..2ffac9cf7c 100644
--- a/arch/arm/mach-imx/mx7ulp/Kconfig
+++ b/arch/arm/mach-imx/mx7ulp/Kconfig
@@ -9,6 +9,7 @@ config LDO_ENABLED_MODE
Select this option to enable the PMC1 LDO.
config MX7ULP
+ select HAS_CAAM
bool
choice
diff --git a/drivers/crypto/fsl/jobdesc.c b/drivers/crypto/fsl/jobdesc.c
index fbc1aeddee..8c3db64527 100644
--- a/drivers/crypto/fsl/jobdesc.c
+++ b/drivers/crypto/fsl/jobdesc.c
@@ -15,7 +15,7 @@
#include "rsa_caam.h"
#include <asm/cache.h>
-#if defined(CONFIG_MX6) || defined(CONFIG_MX7)
+#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)
/*!
* Secure memory run command
*
diff --git a/include/fsl_sec.h b/include/fsl_sec.h
index c661bd6ead..a98f6cb12a 100644
--- a/include/fsl_sec.h
+++ b/include/fsl_sec.h
@@ -195,7 +195,7 @@ typedef struct ccsr_sec {
struct jr_regs {
#if defined(CONFIG_SYS_FSL_SEC_LE) && \
- !(defined(CONFIG_MX6) || defined(CONFIG_MX7))
+ !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP))
u32 irba_l;
u32 irba_h;
#else
@@ -209,7 +209,7 @@ struct jr_regs {
u32 rsvd3;
u32 irja;
#if defined(CONFIG_SYS_FSL_SEC_LE) && \
- !(defined(CONFIG_MX6) || defined(CONFIG_MX7))
+ !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP))
u32 orba_l;
u32 orba_h;
#else
@@ -242,7 +242,7 @@ struct jr_regs {
*/
struct sg_entry {
#if defined(CONFIG_SYS_FSL_SEC_LE) && \
- !(defined(CONFIG_MX6) || defined(CONFIG_MX7))
+ !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP))
uint32_t addr_lo; /* Memory Address - lo */
uint32_t addr_hi; /* Memory Address of start of buffer - hi */
#else
@@ -263,7 +263,7 @@ struct sg_entry {
#define BLOB_SIZE(x) ((x) + 32 + 16) /* Blob buffer size */
-#if defined(CONFIG_MX6) || defined(CONFIG_MX7)
+#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)
/* Job Ring Base Address */
#define JR_BASE_ADDR(x) (CONFIG_SYS_FSL_SEC_ADDR + 0x1000 * (x + 1))
/* Secure Memory Offset varies accross versions */
--
2.25.1
