Hi Tom,
please pull the next batch of Marvell Armada related patches, mostly
the ones dropped last time because of Xilinx issue (fixed now). Here
the summary log:
----------------------------------------------------------------
- Sync Armada mvpp2 ethernet driver with Marvell version (misc Marvell
authors)
----------------------------------------------------------------
Here the Azure build, without any issues:
https://dev.azure.com/sr0718/u-boot/_build/results?buildId=91&view=results
Thanks,
Stefan
The following changes since commit 27c2236f8acfa311eed2c8f8d210824fadd25483:
Merge tag 'xilinx-for-v2021.07-rc3' of
https://source.denx.de/u-boot/custodians/u-boot-microblaze (2021-05-19
11:50:25 -0400)
are available in the Git repository at:
g...@source.denx.de:u-boot/custodians/u-boot-marvell.git
for you to fetch changes up to c350601348b7c3adc958f676c699de66b39ada0e:
arm: mvebu: armada-3720-uDPU.dts: Change back to phy-mode
"2500base-x" (2021-05-20 13:05:31 +0200)
----------------------------------------------------------------
Ben Peled (3):
net: mvpp2: AN Bypass in 1000 and 2500 basex mode
net: mvpp2: remove unused define MVPP22_SMI_PHY_ADDR_REG
net: mvpp2: fix missing switch case break
Marcin Wojtas (2):
net: mvpp2: remove redundant SMI address configuration
net: mvpp2: add explicit sgmii-2500 support
Stefan Chulski (5):
phy: introduce 1000BaseX and 2500BaseX modes
net: mvpp2: add CP115 port1 10G/5G SFI support
net: mvpp2: add 1000BaseX and 2500BaseX ppv2 support
net: mvpp2: Fix 2.5G GMII_SPEED configurations
net: mvpp2: allow MDIO registration for fixed links
Stefan Roese (1):
arm: mvebu: armada-3720-uDPU.dts: Change back to phy-mode
"2500base-x"
arch/arm/dts/armada-3720-uDPU.dts | 4 +-
drivers/net/mvpp2.c | 257
+++++++++++++++++++++++---------------
include/phy_interface.h | 4 +
3 files changed, 165 insertions(+), 100 deletions(-)
