[PATCH 4/9] arm: imx: imx8mm: add enable_pwm_clk function

[Tommaso Merciai]

Add function to enable_pwm_clck function into clock_imx8mm.c. This
function first configure, then enable pwm1 clock from clock control
register. The following configuration is used:

source(0) -> 24 MHz ref clock
div(0)    -> no division for this clock

References:
 - iMX8MMRM.pdf p 303

Signed-off-by: Tommaso Merciai <tommaso.merc...@amarulasolutions.com>
---
 arch/arm/mach-imx/imx8m/clock_imx8mm.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c 
b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
index 49945faf2c..5f2eddf715 100644
--- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c
+++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
@@ -313,6 +313,17 @@ void enable_usboh3_clk(unsigned int enable)
        }
 }
 
+void enable_pwm_clk(unsigned char enable)
+{
+       if (enable) {
+               clock_enable(CCGR_PWM1, false);
+               clock_set_target_val(PWM1_CLK_ROOT, CLK_ROOT_ON | 
CLK_ROOT_SOURCE_SEL(0) |CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1));
+               clock_enable(CCGR_PWM1, true);
+       } else {
+               clock_enable(CCGR_PWM1, false);
+       }
+}
+
 void init_uart_clk(u32 index)
 {
        /*
-- 
2.25.1