From: Marcel Ziswiler <marcel.ziswi...@toradex.com>

Synchronise device tree with linux-next next-20220708.

Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device trees we are now using the
regular ones for the Colibri Evaluation (carrier) board V3 (e.g.
imx7d-colibri-eval-v3.dtb rather than the previous
imx7-colibri-rawnand.dtb and imx7d-colibri-emmc-eval-v3.dtb rather than
the previous imx7-colibri-emmc.dtb).

Please further note that the PMIC node name got changed from rn5t567@33
to pmic@33 which required adjustment in resp. board file
board/toradex/colibri_imx7/colibri_imx7.c.

Signed-off-by: Marcel Ziswiler <marcel.ziswi...@toradex.com>
---

 arch/arm/dts/Makefile                         |    4 +-
 arch/arm/dts/imx7-colibri-emmc.dts            |   94 --
 arch/arm/dts/imx7-colibri-eval-v3.dtsi        |  110 ++
 arch/arm/dts/imx7-colibri-rawnand.dts         |   96 --
 arch/arm/dts/imx7-colibri.dtsi                | 1156 +++++++++++++++--
 .../imx7d-colibri-emmc-eval-v3-u-boot.dtsi    |    1 +
 arch/arm/dts/imx7d-colibri-emmc-eval-v3.dts   |   21 +
 arch/arm/dts/imx7d-colibri-emmc.dtsi          |   61 +
 ...dtsi => imx7d-colibri-eval-v3-u-boot.dtsi} |   10 +-
 arch/arm/dts/imx7d-colibri-eval-v3.dts        |   56 +
 arch/arm/dts/imx7d-colibri.dtsi               |   35 +
 board/toradex/colibri_imx7/MAINTAINERS        |   14 +-
 board/toradex/colibri_imx7/colibri_imx7.c     |    4 +-
 configs/colibri_imx7_defconfig                |    2 +-
 configs/colibri_imx7_emmc_defconfig           |    2 +-
 15 files changed, 1325 insertions(+), 341 deletions(-)
 delete mode 100644 arch/arm/dts/imx7-colibri-emmc.dts
 create mode 100644 arch/arm/dts/imx7-colibri-eval-v3.dtsi
 delete mode 100644 arch/arm/dts/imx7-colibri-rawnand.dts
 create mode 120000 arch/arm/dts/imx7d-colibri-emmc-eval-v3-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx7d-colibri-emmc-eval-v3.dts
 create mode 100644 arch/arm/dts/imx7d-colibri-emmc.dtsi
 rename arch/arm/dts/{imx7-colibri-u-boot.dtsi => 
imx7d-colibri-eval-v3-u-boot.dtsi} (79%)
 create mode 100644 arch/arm/dts/imx7d-colibri-eval-v3.dts
 create mode 100644 arch/arm/dts/imx7d-colibri.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 5890ee1fecf..dcd827d011b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -905,8 +905,8 @@ dtb-$(CONFIG_EV_IMX280_NANO_X_MB) += \
 dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \
        imx7d-sdb-qspi.dtb \
        imx7-cm.dtb \
-       imx7-colibri-emmc.dtb \
-       imx7-colibri-rawnand.dtb \
+       imx7d-colibri-emmc-eval-v3.dtb \
+       imx7d-colibri-eval-v3.dtb \
        imx7s-warp.dtb \
        imx7d-meerkat96.dtb \
        imx7d-pico-pi.dtb \
diff --git a/arch/arm/dts/imx7-colibri-emmc.dts 
b/arch/arm/dts/imx7-colibri-emmc.dts
deleted file mode 100644
index 8545498275e..00000000000
--- a/arch/arm/dts/imx7-colibri-emmc.dts
+++ /dev/null
@@ -1,94 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
-/*
- * Copyright 2019 Toradex AG
- */
-
-/dts-v1/;
-#include "imx7-colibri.dtsi"
-#include "imx7-colibri-u-boot.dtsi"
-
-/ {
-       model = "Toradex Colibri iMX7D 1GB (eMMC)";
-       compatible = "toradex,imx7d-colibri-emmc", "fsl,imx7d";
-
-       aliases {
-               mmc0 = &usdhc3;
-               mmc1 = &usdhc1;
-               display1 = &lcdif;
-               usb0 = &usbotg1; /* required for ums */
-       };
-
-       chosen {
-               stdout-path = &uart1;
-       };
-
-       reg_5v0: regulator-5v0 {
-               compatible = "regulator-fixed";
-               regulator-name = "5V";
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-       };
-
-       reg_usbh_vbus: regulator-usbh-vbus {
-               compatible = "regulator-fixed";
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_usbh_reg>;
-               regulator-name = "VCC_USB[1-4]";
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-               gpio = <&gpio4 7 GPIO_ACTIVE_LOW>;
-               vin-supply = <&reg_5v0>;
-       };
-};
-
-&usdhc3 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_usdhc3>;
-       bus-width = <8>;
-       non-removable;
-       status = "okay";
-};
-
-&iomuxc {
-       pinctrl_usdhc3: usdhc3grp {
-               fsl,pins = <
-                       MX7D_PAD_SD3_CMD__SD3_CMD               0x59
-                       MX7D_PAD_SD3_CLK__SD3_CLK               0x19
-                       MX7D_PAD_SD3_DATA0__SD3_DATA0           0x59
-                       MX7D_PAD_SD3_DATA1__SD3_DATA1           0x59
-                       MX7D_PAD_SD3_DATA2__SD3_DATA2           0x59
-                       MX7D_PAD_SD3_DATA3__SD3_DATA3           0x59
-                       MX7D_PAD_SD3_DATA4__SD3_DATA4           0x59
-                       MX7D_PAD_SD3_DATA5__SD3_DATA5           0x59
-                       MX7D_PAD_SD3_DATA6__SD3_DATA6           0x59
-                       MX7D_PAD_SD3_DATA7__SD3_DATA7           0x59
-                       MX7D_PAD_SD3_STROBE__SD3_STROBE         0x19
-               >;
-       };
-
-       pinctrl_usbh_reg: gpio-usbh-vbus {
-               fsl,pins = <
-                       MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14
-               >;
-       };
-};
-
-/* Colibri USBC */
-&usbotg1 {
-       /*
-        * usbotg1 on Colibri iMX7 can function in both host/otg modes.
-        * Gadget stack currently does not look at this at all while
-        * the host stack refuses to bind/load if it is not set to host
-        * (it obviously won't be enumerated during usb start invocation
-        * if dr_mode = "otg")
-        */
-       dr_mode = "host";
-       status = "okay";
-};
-
-/* Colibri USBH */
-&usbotg2 {
-       dr_mode = "host";
-       vbus-supply = <&reg_usbh_vbus>;
-       status = "okay";
-};
diff --git a/arch/arm/dts/imx7-colibri-eval-v3.dtsi 
b/arch/arm/dts/imx7-colibri-eval-v3.dtsi
new file mode 100644
index 00000000000..826f13da5b8
--- /dev/null
+++ b/arch/arm/dts/imx7-colibri-eval-v3.dtsi
@@ -0,0 +1,110 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2016-2022 Toradex
+ */
+
+/ {
+       /* Fixed crystal dedicated to MCP2515. */
+       clk16m: clk16m {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <16000000>;
+       };
+};
+
+/* Colibri AD0 to AD3 */
+&adc1 {
+       status = "okay";
+};
+
+/*
+ * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, 
PWM<C>, aka pwm2, pwm3.
+ * So if you enable following capacitive touch controller, disable pwm2/pwm3 
first.
+ */
+&atmel_mxt_ts {
+       interrupt-parent = <&gpio1>;
+       interrupts = <9 IRQ_TYPE_EDGE_FALLING>;         /* SODIMM 28 / INT */
+       pinctrl-0 = <&pinctrl_atmel_adapter>;
+       reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;      /* SODIMM 30 / RST */
+       status = "disabled";
+};
+
+/* Colibri SSP */
+&ecspi3 {
+       status = "okay";
+
+       mcp2515: can@0 {
+               clocks = <&clk16m>;
+               compatible = "microchip,mcp2515";
+               interrupt-parent = <&gpio5>;
+               interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_can_int>;
+               reg = <0>;
+               spi-max-frequency = <10000000>;
+               vdd-supply = <&reg_3v3>;
+               xceiver-supply = <&reg_5v0>;
+       };
+};
+
+/* Colibri Fast Ethernet */
+&fec1 {
+       status = "okay";
+};
+
+/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */
+&i2c4 {
+       status = "okay";
+};
+
+/* Colibri PWM<A> */
+&pwm1 {
+       status = "okay";
+};
+
+/* Colibri PWM<B> */
+&pwm2 {
+       /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for 
adapter. */
+       status = "okay";
+};
+
+/* Colibri PWM<C> */
+&pwm3 {
+       /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for 
adapter. */
+       status = "okay";
+};
+
+/* Colibri PWM<D> */
+&pwm4 {
+       status = "okay";
+};
+
+/* M41T0M6 real time clock */
+&rtc {
+       status = "okay";
+};
+
+/* Colibri UART_A */
+&uart1 {
+       status = "okay";
+};
+
+/* Colibri UART_B */
+&uart2 {
+       status = "okay";
+};
+
+/* Colibri UART_C */
+&uart3 {
+       status = "okay";
+};
+
+/* Colibri USBC */
+&usbotg1 {
+       status = "okay";
+};
+
+/* Colibri MMC/SD */
+&usdhc1 {
+       status = "okay";
+};
diff --git a/arch/arm/dts/imx7-colibri-rawnand.dts 
b/arch/arm/dts/imx7-colibri-rawnand.dts
deleted file mode 100644
index 5211fb1f44f..00000000000
--- a/arch/arm/dts/imx7-colibri-rawnand.dts
+++ /dev/null
@@ -1,96 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
-/*
- * Copyright 2019 Toradex AG
- */
-
-/dts-v1/;
-#include "imx7-colibri.dtsi"
-#include "imx7-colibri-u-boot.dtsi"
-
-/ {
-       model = "Toradex Colibri iMX7S/D";
-       compatible = "toradex,imx7-colibri", "fsl,imx7";
-
-       aliases {
-               display1 = &lcdif;
-               usb0 = &usbotg1; /* required for ums */
-       };
-
-       chosen {
-               stdout-path = &uart1;
-       };
-
-       reg_5v0: regulator-5v0 {
-               compatible = "regulator-fixed";
-               regulator-name = "5V";
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-       };
-
-       reg_usbh_vbus: regulator-usbh-vbus {
-               compatible = "regulator-fixed";
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_usbh_reg>;
-               regulator-name = "VCC_USB[1-4]";
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-               gpio = <&gpio4 7 GPIO_ACTIVE_LOW>;
-               vin-supply = <&reg_5v0>;
-       };
-};
-
-&gpmi {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_gpmi_nand>;
-       fsl,use-minimum-ecc;
-       nand-on-flash-bbt;
-       nand-ecc-mode = "hw";
-       status = "okay";
-};
-
-&iomuxc {
-       pinctrl_gpmi_nand: gpmi-nand-grp {
-               fsl,pins = <
-                       MX7D_PAD_SD3_CLK__NAND_CLE              0x71
-                       MX7D_PAD_SD3_CMD__NAND_ALE              0x71
-                       MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B       0x71
-                       MX7D_PAD_SAI1_TX_DATA__NAND_READY_B     0x74
-                       MX7D_PAD_SD3_STROBE__NAND_RE_B          0x71
-                       MX7D_PAD_SD3_RESET_B__NAND_WE_B         0x71
-                       MX7D_PAD_SD3_DATA0__NAND_DATA00         0x71
-                       MX7D_PAD_SD3_DATA1__NAND_DATA01         0x71
-                       MX7D_PAD_SD3_DATA2__NAND_DATA02         0x71
-                       MX7D_PAD_SD3_DATA3__NAND_DATA03         0x71
-                       MX7D_PAD_SD3_DATA4__NAND_DATA04         0x71
-                       MX7D_PAD_SD3_DATA5__NAND_DATA05         0x71
-                       MX7D_PAD_SD3_DATA6__NAND_DATA06         0x71
-                       MX7D_PAD_SD3_DATA7__NAND_DATA07         0x71
-               >;
-       };
-
-       pinctrl_usbh_reg: gpio-usbh-vbus {
-               fsl,pins = <
-                       MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14
-               >;
-       };
-};
-
-/* Colibri USBC */
-&usbotg1 {
-       /*
-        * usbotg1 on Colibri iMX7 can function in both host/otg modes.
-        * Gadget stack currently does not look at this at all while
-        * the host stack refuses to bind/load if it is not set to host
-        * (it obviously won't be enumerated during usb start invocation
-        * if dr_mode = "otg")
-        */
-       dr_mode = "host";
-       status = "okay";
-};
-
-/* Colibri USBH */
-&usbotg2 {
-       dr_mode = "host";
-       vbus-supply = <&reg_usbh_vbus>;
-       status = "okay";
-};
diff --git a/arch/arm/dts/imx7-colibri.dtsi b/arch/arm/dts/imx7-colibri.dtsi
index b352036e304..a8c31ee6562 100644
--- a/arch/arm/dts/imx7-colibri.dtsi
+++ b/arch/arm/dts/imx7-colibri.dtsi
@@ -1,261 +1,1143 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 /*
- * Copyright 2016-2019 Toradex AG
+ * Copyright 2016-2022 Toradex
  */
 
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include "imx7d.dtsi"
+#include <dt-bindings/pwm/pwm.h>
 
+/ {
+       aliases {
+               rtc0 = &rtc;
+               rtc1 = &snvs_rtc;
+       };
+
+       backlight: backlight {
+               brightness-levels = <0 45 63 88 119 158 203 255>;
+               compatible = "pwm-backlight";
+               default-brightness-level = <4>;
+               enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_gpio_bl_on>;
+               power-supply = <&reg_module_3v3>;
+               pwms = <&pwm1 0 6666667 PWM_POLARITY_INVERTED>;
+               status = "disabled";
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       extcon_usbc_det: usbc-det {
+               compatible = "linux,extcon-usb-gpio";
+               debounce = <25>;
+               id-gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>; /* SODIMM 137 / 
USBC_DET */
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_usbc_det>;
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_gpiokeys>;
+
+               wakeup {
+                       debounce-interval = <10>;
+                       gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; 
/* SODIMM 45 */
+                       label = "Wake-Up";
+                       linux,code = <KEY_WAKEUP>;
+                       wakeup-source;
+               };
+       };
+
+       panel_dpi: panel-dpi {
+               backlight = <&backlight>;
+               compatible = "edt,et057090dhu";
+               power-supply = <&reg_3v3>;
+               status = "disabled";
+
+               port {
+                       lcd_panel_in: endpoint {
+                               remote-endpoint = <&lcdif_out>;
+                       };
+               };
+       };
+
+       reg_3v3: regulator-3v3 {
+               compatible = "regulator-fixed";
+               regulator-always-on;
+               regulator-max-microvolt = <3300000>;
+               regulator-min-microvolt = <3300000>;
+               regulator-name = "3.3V";
+       };
+
+       reg_5v0: regulator-5v0 {
+               compatible = "regulator-fixed";
+               regulator-always-on;
+               regulator-max-microvolt = <5000000>;
+               regulator-min-microvolt = <5000000>;
+               regulator-name = "5V";
+       };
+
+       reg_module_3v3: regulator-module-3v3 {
+               compatible = "regulator-fixed";
+               regulator-always-on;
+               regulator-max-microvolt = <3300000>;
+               regulator-min-microvolt = <3300000>;
+               regulator-name = "+V3.3";
+       };
+
+       reg_module_3v3_avdd: regulator-module-3v3-avdd {
+               compatible = "regulator-fixed";
+               regulator-always-on;
+               regulator-max-microvolt = <3300000>;
+               regulator-min-microvolt = <3300000>;
+               regulator-name = "+V3.3_AVDD_AUDIO";
+       };
+
+       reg_module_3v3_eth: regulator-module-3v3-eth {
+               compatible = "regulator-fixed";
+               off-on-delay-us = <200000>;
+               regulator-name = "+V3.3_ETH";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               startup-delay-us = <200000>;
+               vin-supply = <&reg_LDO1>;
+       };
+
+       reg_usbh_vbus: regulator-usbh-vbus {
+               compatible = "regulator-fixed";
+               gpio = <&gpio4 7 GPIO_ACTIVE_LOW>; /* SODIMM 129 / USBH_PEN */
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_usbh_reg>;
+               regulator-max-microvolt = <5000000>;
+               regulator-min-microvolt = <5000000>;
+               regulator-name = "VCC_USB[1-4]";
+               vin-supply = <&reg_5v0>;
+       };
+
+       sound {
+               compatible = "simple-audio-card";
+               simple-audio-card,bitclock-master = <&dailink_master>;
+               simple-audio-card,format = "i2s";
+               simple-audio-card,frame-master = <&dailink_master>;
+               simple-audio-card,name = "imx7-sgtl5000";
+
+               simple-audio-card,cpu {
+                       sound-dai = <&sai1>;
+               };
+
+               dailink_master: simple-audio-card,codec {
+                       clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
+                       sound-dai = <&codec>;
+               };
+       };
+};
+
+/* Colibri AD0 to AD3 */
+&adc1 {
+       vref-supply = <&reg_DCDC3>;
+};
+
+/* ADC2 is not available as it conflicts with AD7879 resistive touchscreen. */
+
+&cpu0 {
+       cpu-supply = <&reg_DCDC2>;
+};
+
+/* Colibri SSP */
+&ecspi3 {
+       cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; /* SODIMM 86 / SSPFRM */
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>;
+};
+
+/* Colibri Fast Ethernet */
+&fec1 {
+       assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
+       assigned-clock-rates = <0>, <100000000>;
+       assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
+                         <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
+       clock-names = "ipg", "ahb", "ptp", "enet_clk_ref";
+       clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
+                <&clks IMX7D_ENET_AXI_ROOT_CLK>,
+                <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
+                <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>;
+       fsl,magic-packet;
+       phy-handle = <&ethphy0>;
+       phy-mode = "rmii";
+       phy-supply = <&reg_module_3v3_eth>;
+       pinctrl-names = "default", "sleep";
+       pinctrl-0 = <&pinctrl_enet1>;
+       pinctrl-1 = <&pinctrl_enet1_sleep>;
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               /* Micrel KSZ8041RNL */
+               ethphy0: ethernet-phy@0 {
+                       compatible = "ethernet-phy-ieee802.3-c22";
+                       max-speed = <100>;
+                       micrel,led-mode = <0>;
+                       reg = <0>;
+               };
+       };
+};
+
+&flexcan1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_flexcan1>;
+};
+
+&flexcan2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_flexcan2>;
+};
+
+&gpio1 {
+       gpio-line-names = "SODIMM_43",
+                         "SODIMM_45",
+                         "SODIMM_135",
+                         "SODIMM_22",
+                         "",
+                         "",
+                         "SODIMM_37",
+                         "SODIMM_29",
+                         "SODIMM_59",
+                         "SODIMM_28",
+                         "SODIMM_30",
+                         "SODIMM_67",
+                         "",
+                         "",
+                         "SODIMM_188",
+                         "SODIMM_178";
+};
+
+&gpio2 {
+       gpio-line-names = "SODIMM_111",
+                         "SODIMM_113",
+                         "SODIMM_115",
+                         "SODIMM_117",
+                         "SODIMM_119",
+                         "SODIMM_121",
+                         "SODIMM_123",
+                         "SODIMM_125",
+                         "SODIMM_91",
+                         "SODIMM_89",
+                         "SODIMM_105",
+                         "SODIMM_152",
+                         "SODIMM_150",
+                         "SODIMM_95",
+                         "SODIMM_126",
+                         "SODIMM_107",
+                         "SODIMM_114",
+                         "SODIMM_116",
+                         "SODIMM_118",
+                         "SODIMM_120",
+                         "SODIMM_122",
+                         "SODIMM_124",
+                         "SODIMM_127",
+                         "SODIMM_130",
+                         "SODIMM_132",
+                         "SODIMM_134",
+                         "SODIMM_133",
+                         "SODIMM_104",
+                         "SODIMM_106",
+                         "SODIMM_110",
+                         "SODIMM_112",
+                         "SODIMM_128";
+};
+
+&gpio3 {
+       gpio-line-names = "SODIMM_56",
+                         "SODIMM_44",
+                         "SODIMM_68",
+                         "SODIMM_82",
+                         "SODIMM_93",
+                         "SODIMM_76",
+                         "SODIMM_70",
+                         "SODIMM_60",
+                         "SODIMM_58",
+                         "SODIMM_78",
+                         "SODIMM_72",
+                         "SODIMM_80",
+                         "SODIMM_46",
+                         "SODIMM_62",
+                         "SODIMM_48",
+                         "SODIMM_74",
+                         "SODIMM_50",
+                         "SODIMM_52",
+                         "SODIMM_54",
+                         "SODIMM_66",
+                         "SODIMM_64",
+                         "SODIMM_57",
+                         "SODIMM_61",
+                         "SODIMM_136",
+                         "SODIMM_138",
+                         "SODIMM_140",
+                         "SODIMM_142",
+                         "SODIMM_144",
+                         "SODIMM_146";
+};
+
+&gpio4 {
+       gpio-line-names = "SODIMM_35",
+                         "SODIMM_33",
+                         "SODIMM_38",
+                         "SODIMM_36",
+                         "SODIMM_21",
+                         "SODIMM_19",
+                         "SODIMM_131",
+                         "SODIMM_129",
+                         "SODIMM_90",
+                         "SODIMM_92",
+                         "SODIMM_88",
+                         "SODIMM_86",
+                         "SODIMM_81",
+                         "SODIMM_94",
+                         "SODIMM_96",
+                         "SODIMM_75",
+                         "SODIMM_101",
+                         "SODIMM_103",
+                         "SODIMM_79",
+                         "SODIMM_97",
+                         "SODIMM_67",
+                         "SODIMM_59",
+                         "SODIMM_85",
+                         "SODIMM_65";
+};
+
+&gpio5 {
+       gpio-line-names = "SODIMM_69",
+                         "SODIMM_71",
+                         "SODIMM_73",
+                         "SODIMM_47",
+                         "SODIMM_190",
+                         "SODIMM_192",
+                         "SODIMM_49",
+                         "SODIMM_51",
+                         "SODIMM_53",
+                         "",
+                         "",
+                         "SODIMM_98",
+                         "SODIMM_184",
+                         "SODIMM_186",
+                         "SODIMM_23",
+                         "SODIMM_31",
+                         "SODIMM_100",
+                         "SODIMM_102";
+};
+
+&gpio6 {
+       gpio-line-names = "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "SODIMM_169",
+                         "",
+                         "",
+                         "",
+                         "SODIMM_77",
+                         "SODIMM_24",
+                         "",
+                         "SODIMM_25",
+                         "SODIMM_27",
+                         "SODIMM_32",
+                         "SODIMM_34";
+};
+
+&gpio7 {
+       gpio-line-names = "",
+                         "",
+                         "SODIMM_63",
+                         "SODIMM_55",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "SODIMM_196",
+                         "SODIMM_194",
+                         "",
+                         "SODIMM_99",
+                         "",
+                         "",
+                         "SODIMM_137";
+};
+
+/* NAND on such SKUs */
+&gpmi {
+       fsl,use-minimum-ecc;
+       nand-ecc-mode = "hw";
+       nand-on-flash-bbt;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_gpmi_nand>;
+};
+
+/* On-module Power I2C */
 &i2c1 {
+       clock-frequency = <100000>;
        pinctrl-names = "default", "gpio";
-       pinctrl-0 = <&pinctrl_i2c1>;
-       pinctrl-1 = <&pinctrl_i2c1_gpio>;
-       sda-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
-       scl-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&pinctrl_i2c1 &pinctrl_i2c1_int>;
+       pinctrl-1 = <&pinctrl_i2c1_recovery &pinctrl_i2c1_int>;
+       scl-gpios = <&gpio1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
-       rn5t567@33 {
+       codec: sgtl5000@a {
+               #sound-dai-cells = <0>;
+               clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
+               compatible = "fsl,sgtl5000";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_sai1_mclk>;
+               reg = <0xa>;
+               VDDA-supply = <&reg_module_3v3_avdd>;
+               VDDD-supply = <&reg_DCDC3>;
+               VDDIO-supply = <&reg_module_3v3>;
+       };
+
+       ad7879_ts: touchscreen@2c {
+               adi,acquisition-time = /bits/ 8 <1>;
+               adi,averaging = /bits/ 8 <1>;
+               adi,conversion-interval = /bits/ 8 <255>;
+               adi,first-conversion-delay = /bits/ 8 <3>;
+               adi,median-filter-size = /bits/ 8 <2>;
+               adi,resistance-plate-x = <120>;
+               compatible = "adi,ad7879-1";
+               interrupt-parent = <&gpio1>;
+               interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
+               reg = <0x2c>;
+               touchscreen-max-pressure = <4096>;
+               status = "disabled";
+       };
+
+       pmic@33 {
                compatible = "ricoh,rn5t567";
                reg = <0x33>;
 
                regulators {
-                       reg_DCDC1: DCDC1 {  /* V1.0_SOC */
-                               regulator-min-microvolt = <1000000>;
-                               regulator-max-microvolt = <1100000>;
-                               regulator-boot-on;
+                       reg_DCDC1: DCDC1 {
                                regulator-always-on;
+                               regulator-boot-on;
+                               regulator-max-microvolt = <1100000>;
+                               regulator-min-microvolt = <1000000>;
+                               regulator-name = "+V1.0_SOC";
                        };
 
-                       reg_DCDC2: DCDC2 { /* V1.1_ARM */
-                               regulator-min-microvolt = <975000>;
-                               regulator-max-microvolt = <1100000>;
-                               regulator-boot-on;
+                       reg_DCDC2: DCDC2 {
                                regulator-always-on;
+                               regulator-boot-on;
+                               regulator-max-microvolt = <1100000>;
+                               regulator-min-microvolt = <975000>;
+                               regulator-name = "+V1.1_ARM";
                        };
 
-                       reg_DCDC3: DCDC3 { /* V1.8 */
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <1800000>;
-                               regulator-boot-on;
+                       reg_DCDC3: DCDC3 {
                                regulator-always-on;
+                               regulator-boot-on;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-name = "+V1.8";
                        };
 
-                       reg_DCDC4: DCDC4 { /* V1.35_DRAM */
-                               regulator-min-microvolt = <1350000>;
-                               regulator-max-microvolt = <1350000>;
-                               regulator-boot-on;
+                       reg_DCDC4: DCDC4 {
                                regulator-always-on;
+                               regulator-boot-on;
+                               regulator-max-microvolt = <1350000>;
+                               regulator-min-microvolt = <1350000>;
+                               regulator-name = "+V1.35_DRAM";
                        };
 
-                       reg_LDO1: LDO1 { /* PWR_EN_+V3.3_ETH */
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <3300000>;
+                       reg_LDO1: LDO1 {
                                regulator-boot-on;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-min-microvolt = <3300000>;
+                               regulator-name = "PWR_EN_+V3.3_ETH";
                        };
 
-                       reg_LDO2: LDO2 { /* +V1.8_SD */
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <3300000>;
-                               regulator-boot-on;
+                       reg_LDO2: LDO2 {
                                regulator-always-on;
+                               regulator-boot-on;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-name = "+V1.8_SD";
                        };
 
-                       reg_LDO3: LDO3 { /* PWR_EN_+V3.3_LPSR */
-                               regulator-min-microvolt = <3300000>;
-                               regulator-max-microvolt = <3300000>;
-                               regulator-boot-on;
+                       reg_LDO3: LDO3 {
                                regulator-always-on;
+                               regulator-boot-on;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-min-microvolt = <3300000>;
+                               regulator-name = "PWR_EN_+V3.3_LPSR";
                        };
 
-                       reg_LDO4: LDO4 { /* V1.8_LPSR */
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <1800000>;
-                               regulator-boot-on;
+                       reg_LDO4: LDO4 {
                                regulator-always-on;
+                               regulator-boot-on;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-name = "+V1.8_LPSR";
                        };
 
-                       reg_LDO5: LDO5 { /* PWR_EN_+V3.3 */
-                               regulator-min-microvolt = <3300000>;
-                               regulator-max-microvolt = <3300000>;
-                               regulator-boot-on;
+                       reg_LDO5: LDO5 {
                                regulator-always-on;
+                               regulator-boot-on;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-min-microvolt = <3300000>;
+                               regulator-name = "PWR_EN_+V3.3";
                        };
                };
        };
 };
 
+/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */
 &i2c4 {
+       clock-frequency = <100000>;
        pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c4>;
-       pinctrl-1 = <&pinctrl_i2c4_gpio>;
-       sda-gpios = <&gpio7 9 GPIO_ACTIVE_LOW>;
-       scl-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
-       status = "okay";
+       pinctrl-1 = <&pinctrl_i2c4_recovery>;
+       scl-gpios = <&gpio7 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio7 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       status = "disabled";
+
+       /* Atmel maxtouch controller */
+       atmel_mxt_ts: touchscreen@4a {
+               compatible = "atmel,maxtouch";
+               interrupt-parent = <&gpio2>;
+               interrupts = <15 IRQ_TYPE_EDGE_FALLING>;        /* SODIMM 107 / 
INT */
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_atmel_connector>;
+               reg = <0x4a>;
+               reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;      /* SODIMM 106 / 
RST */
+               status = "disabled";
+       };
+
+       /* M41T0M6 real time clock on carrier board */
+       rtc: rtc@68 {
+               compatible = "st,m41t0";
+               reg = <0x68>;
+               status = "disabled";
+       };
 };
 
-&fec1 {
-       pinctrl-names = "default", "sleep";
-       pinctrl-0 = <&pinctrl_enet1>;
-       pinctrl-1 = <&pinctrl_enet1_sleep>;
-       clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
-               <&clks IMX7D_ENET_AXI_ROOT_CLK>,
-               <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
-               <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>;
-       clock-names = "ipg", "ahb", "ptp", "enet_clk_ref";
-       assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
-                         <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
-       assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
-       assigned-clock-rates = <0>, <100000000>;
-       phy-mode = "rmii";
-       phy-supply = <&reg_LDO1>;
-       fsl,magic-packet;
+&lcdif {
+       assigned-clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_SRC>;
+       assigned-clock-parents = <&clks IMX7D_PLL_VIDEO_POST_DIV>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lcdif_dat
+                    &pinctrl_lcdif_ctrl>;
+       status = "disabled";
+
+       port {
+               lcdif_out: endpoint {
+                       remote-endpoint = <&lcd_panel_in>;
+               };
+       };
+};
+
+/* Colibri PWM<A> */
+&pwm1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm1>;
+};
+
+/* Colibri PWM<B> */
+&pwm2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm2>;
+};
+
+/* Colibri PWM<C> */
+&pwm3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm3>;
+};
+
+/* Colibri PWM<D> */
+&pwm4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm4>;
+};
+
+&reg_1p0d {
+       vin-supply = <&reg_DCDC3>; /* VDDA_1P8_IN */
+};
+
+&sai1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_sai1>;
        status = "okay";
 };
 
+/* Colibri UART_A */
 &uart1 {
+       assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
+       assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
+       fsl,dte-mode;
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>;
+       pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1 &pinctrl_uart1_ctrl2>;
        uart-has-rtscts;
+};
+
+/* Colibri UART_B */
+&uart2 {
+       assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
+       assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
        fsl,dte-mode;
-       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart2>;
+       uart-has-rtscts;
 };
 
-&usdhc1 {
+/* Colibri UART_C */
+&uart3 {
+       assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
+       assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
+       fsl,dte-mode;
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
-       no-1-8-v;
+       pinctrl-0 = <&pinctrl_uart3>;
+};
+
+/* Colibri USBC */
+&usbotg1 {
+       dr_mode = "otg";
+       extcon = <0>, <&extcon_usbc_det>;
+};
+
+/* Colibri MMC/SD */
+&usdhc1 {
        cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
        disable-wp;
-       status = "okay";
+       no-1-8-v;
+       pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
+       pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
+       pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_cd_usdhc1>;
+       pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_cd_usdhc1>;
+       pinctrl-3 = <&pinctrl_usdhc1_sleep &pinctrl_cd_usdhc1_sleep>;
+       vmmc-supply = <&reg_3v3>;
+       vqmmc-supply = <&reg_LDO2>;
+       wakeup-source;
 };
 
-&iomuxc {
-       pinctrl_i2c4: i2c4-grp {
-               fsl,pins = <
-                       MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA      0x4000007f
-                       MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL      0x4000007f
-               >;
-       };
+/* eMMC on 1GB (eMMC) SKUs */
+&usdhc3 {
+       assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
+       assigned-clock-rates = <400000000>;
+       bus-width = <8>;
+       fsl,tuning-step = <2>;
+       non-removable;
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+       pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+       sdhci-caps-mask = <0x80000000 0x0>;
+       vmmc-supply = <&reg_module_3v3>;
+       vqmmc-supply = <&reg_DCDC3>;
+};
 
-       pinctrl_i2c4_gpio: i2c4-gpio-grp {
-                       fsl,pins = <
-                       MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9     0x4000007f
-                       MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8     0x4000007f
-               >;
-       };
+&iomuxc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 
&pinctrl_gpio4>;
 
-       pinctrl_uart1: uart1-grp {
+       /*
+        * Atmel MXT touchsceen + Capacitive Touch Adapter
+        * NOTE: This pin group conflicts with pin groups 
pinctrl_pwm2/pinctrl_pwm3.
+        * Don't use them simultaneously.
+        */
+       pinctrl_atmel_adapter: atmelconnectorgrp {
                fsl,pins = <
-                       MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX    0x79
-                       MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX    0x79
-                       MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS    0x79
-                       MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS    0x79
+                       MX7D_PAD_GPIO1_IO09__GPIO1_IO9          0x74 /* SODIMM 
28 / INT */
+                       MX7D_PAD_GPIO1_IO10__GPIO1_IO10         0x14 /* SODIMM 
30 / RST */
                >;
        };
 
-       pinctrl_uart1_ctrl1: uart1-ctrl1-grp {
+       /* Atmel MXT touchsceen + boards with built-in Capacitive Touch 
Connector */
+       pinctrl_atmel_connector: atmeladaptergrp {
                fsl,pins = <
-                       MX7D_PAD_SD2_DATA1__GPIO5_IO15          0x14 /* DCD */
-                       MX7D_PAD_SD2_DATA0__GPIO5_IO14          0x14 /* DTR */
+                       MX7D_PAD_EPDC_BDR0__GPIO2_IO28          0x14 /* SODIMM 
106 / RST */
+                       MX7D_PAD_EPDC_DATA15__GPIO2_IO15        0x74 /* SODIMM 
107 / INT */
                >;
        };
 
-       pinctrl_usdhc1: usdhc1-grp {
+       pinctrl_can_int: canintgrp {
                fsl,pins = <
-                       MX7D_PAD_SD1_CMD__SD1_CMD       0x59
-                       MX7D_PAD_SD1_CLK__SD1_CLK       0x19
-                       MX7D_PAD_SD1_DATA0__SD1_DATA0   0x59
-                       MX7D_PAD_SD1_DATA1__SD1_DATA1   0x59
-                       MX7D_PAD_SD1_DATA2__SD1_DATA2   0x59
-                       MX7D_PAD_SD1_DATA3__SD1_DATA3   0x59
+                       MX7D_PAD_SD1_RESET_B__GPIO5_IO2         0X14 /* SODIMM 
73 */
                >;
        };
 
-       pinctrl_lcdif_dat: lcdif-dat-grp {
+       pinctrl_ecspi3: ecspi3grp {
                fsl,pins = <
-                       MX7D_PAD_LCD_DATA00__LCD_DATA0          0x79
-                       MX7D_PAD_LCD_DATA01__LCD_DATA1          0x79
-                       MX7D_PAD_LCD_DATA02__LCD_DATA2          0x79
-                       MX7D_PAD_LCD_DATA03__LCD_DATA3          0x79
-                       MX7D_PAD_LCD_DATA04__LCD_DATA4          0x79
-                       MX7D_PAD_LCD_DATA05__LCD_DATA5          0x79
-                       MX7D_PAD_LCD_DATA06__LCD_DATA6          0x79
-                       MX7D_PAD_LCD_DATA07__LCD_DATA7          0x79
-                       MX7D_PAD_LCD_DATA08__LCD_DATA8          0x79
-                       MX7D_PAD_LCD_DATA09__LCD_DATA9          0x79
-                       MX7D_PAD_LCD_DATA10__LCD_DATA10         0x79
-                       MX7D_PAD_LCD_DATA11__LCD_DATA11         0x79
-                       MX7D_PAD_LCD_DATA12__LCD_DATA12         0x79
-                       MX7D_PAD_LCD_DATA13__LCD_DATA13         0x79
-                       MX7D_PAD_LCD_DATA14__LCD_DATA14         0x79
-                       MX7D_PAD_LCD_DATA15__LCD_DATA15         0x79
-                       MX7D_PAD_LCD_DATA16__LCD_DATA16         0x79
-                       MX7D_PAD_LCD_DATA17__LCD_DATA17         0x79
+                       MX7D_PAD_I2C1_SCL__ECSPI3_MISO          0x2 /* SODIMM 
90 */
+                       MX7D_PAD_I2C1_SDA__ECSPI3_MOSI          0x2 /* SODIMM 
92 */
+                       MX7D_PAD_I2C2_SCL__ECSPI3_SCLK          0x2 /* SODIMM 
88 */
                >;
        };
 
-       pinctrl_lcdif_ctrl: lcdif-ctrl-grp {
+       pinctrl_ecspi3_cs: ecspi3csgrp {
                fsl,pins = <
-                       MX7D_PAD_LCD_CLK__LCD_CLK               0x79
-                       MX7D_PAD_LCD_ENABLE__LCD_ENABLE         0x79
-                       MX7D_PAD_LCD_VSYNC__LCD_VSYNC           0x79
-                       MX7D_PAD_LCD_HSYNC__LCD_HSYNC           0x79
+                       MX7D_PAD_I2C2_SDA__GPIO4_IO11           0x14 /* SODIMM 
86 */
                >;
        };
 
        pinctrl_enet1: enet1grp {
                fsl,pins = <
-                       MX7D_PAD_ENET1_CRS__GPIO7_IO14                  0x14
-                       MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x73
                        MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0       0x73
                        MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1       0x73
                        MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER           0x73
-
-                       MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x73
+                       MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x73
                        MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0       0x73
                        MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1       0x73
+                       MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x73
                        MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1          0x73
                        MX7D_PAD_SD2_CD_B__ENET1_MDIO                   0x3
                        MX7D_PAD_SD2_WP__ENET1_MDC                      0x3
                >;
        };
 
-       pinctrl_enet1_sleep: enet1sleepgrp {
+       pinctrl_enet1_sleep: enet1-sleepgrp {
                fsl,pins = <
-                       MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4          0x0
                        MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0             0x0
                        MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1             0x0
                        MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5             0x0
-
-                       MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10         0x0
+                       MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4          0x0
                        MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6             0x0
                        MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7             0x0
+                       MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10         0x0
                        MX7D_PAD_GPIO1_IO12__GPIO1_IO12                 0x0
                        MX7D_PAD_SD2_CD_B__GPIO5_IO9                    0x0
                        MX7D_PAD_SD2_WP__GPIO5_IO10                     0x0
                >;
        };
+
+       pinctrl_flexcan1: flexcan1grp {
+               fsl,pins = <
+                       MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX   0x79 /* SODIMM 
63 */
+                       MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX   0x79 /* SODIMM 
55 */
+               >;
+       };
+
+       pinctrl_flexcan2: flexcan2grp {
+               fsl,pins = <
+                       MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX        0x79 /* SODIMM 
188 */
+                       MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX        0x79 /* SODIMM 
178 */
+               >;
+       };
+
+       pinctrl_gpio1: gpio1grp {
+               fsl,pins = <
+                       MX7D_PAD_EPDC_BDR1__GPIO2_IO29          0x14 /* SODIMM 
110 */
+                       MX7D_PAD_EPDC_DATA00__GPIO2_IO0         0x14 /* SODIMM 
111 */
+                       MX7D_PAD_EPDC_DATA01__GPIO2_IO1         0x14 /* SODIMM 
113 */
+                       MX7D_PAD_EPDC_DATA02__GPIO2_IO2         0x14 /* SODIMM 
115 */
+                       MX7D_PAD_EPDC_DATA03__GPIO2_IO3         0x14 /* SODIMM 
117 */
+                       MX7D_PAD_EPDC_DATA04__GPIO2_IO4         0x14 /* SODIMM 
119 */
+                       MX7D_PAD_EPDC_DATA05__GPIO2_IO5         0x14 /* SODIMM 
121 */
+                       MX7D_PAD_EPDC_DATA06__GPIO2_IO6         0x14 /* SODIMM 
123 */
+                       MX7D_PAD_EPDC_DATA07__GPIO2_IO7         0x14 /* SODIMM 
125 */
+                       MX7D_PAD_EPDC_DATA08__GPIO2_IO8         0x74 /* SODIMM 
91 */
+                       MX7D_PAD_EPDC_DATA09__GPIO2_IO9         0x14 /* SODIMM 
89 */
+                       MX7D_PAD_EPDC_DATA10__GPIO2_IO10        0x74 /* SODIMM 
105 */
+                       MX7D_PAD_EPDC_DATA11__GPIO2_IO11        0x14 /* SODIMM 
152 */
+                       MX7D_PAD_EPDC_DATA12__GPIO2_IO12        0x14 /* SODIMM 
150 */
+                       MX7D_PAD_EPDC_DATA14__GPIO2_IO14        0x14 /* SODIMM 
126 */
+                       MX7D_PAD_EPDC_GDCLK__GPIO2_IO24         0x14 /* SODIMM 
132 */
+                       MX7D_PAD_EPDC_GDOE__GPIO2_IO25          0x14 /* SODIMM 
134 */
+                       MX7D_PAD_EPDC_GDRL__GPIO2_IO26          0x14 /* SODIMM 
133 */
+                       MX7D_PAD_EPDC_GDSP__GPIO2_IO27          0x14 /* SODIMM 
104 */
+                       MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30       0x14 /* SODIMM 
112 */
+                       MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31      0x14 /* SODIMM 
128 */
+                       MX7D_PAD_EPDC_SDCE0__GPIO2_IO20         0x14 /* SODIMM 
122 */
+                       MX7D_PAD_EPDC_SDCE1__GPIO2_IO21         0x14 /* SODIMM 
124 */
+                       MX7D_PAD_EPDC_SDCE2__GPIO2_IO22         0x14 /* SODIMM 
127 */
+                       MX7D_PAD_EPDC_SDCE3__GPIO2_IO23         0x14 /* SODIMM 
130 */
+                       MX7D_PAD_EPDC_SDCLK__GPIO2_IO16         0x14 /* SODIMM 
114 */
+                       MX7D_PAD_EPDC_SDLE__GPIO2_IO17          0x14 /* SODIMM 
116 */
+                       MX7D_PAD_EPDC_SDOE__GPIO2_IO18          0x14 /* SODIMM 
118 */
+                       MX7D_PAD_EPDC_SDSHR__GPIO2_IO19         0x14 /* SODIMM 
120 */
+                       MX7D_PAD_LCD_RESET__GPIO3_IO4           0x14 /* SODIMM 
93 */
+                       MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17       0x14 /* SODIMM 
24 */
+                       MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12       0x14 /* SODIMM 
169 */
+                       MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16       0x14 /* SODIMM 
77 */
+                       MX7D_PAD_SD2_CLK__GPIO5_IO12            0x14 /* SODIMM 
184 */
+                       MX7D_PAD_SD2_CMD__GPIO5_IO13            0x14 /* SODIMM 
186 */
+                       MX7D_PAD_SD2_DATA2__GPIO5_IO16          0x14 /* SODIMM 
100 */
+                       MX7D_PAD_SD2_DATA3__GPIO5_IO17          0x14 /* SODIMM 
102 */
+                       MX7D_PAD_UART3_RTS_B__GPIO4_IO6         0x14 /* SODIMM 
131 */
+               >;
+       };
+
+       pinctrl_gpio2: gpio2grp { /* On X22 Camera interface */
+               fsl,pins = <
+                       MX7D_PAD_ECSPI1_MISO__GPIO4_IO18        0x14 /* SODIMM 
79 */
+                       MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17        0x14 /* SODIMM 
103 */
+                       MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16        0x14 /* SODIMM 
101 */
+                       MX7D_PAD_ECSPI1_SS0__GPIO4_IO19         0x14 /* SODIMM 
97 */
+                       MX7D_PAD_ECSPI2_MISO__GPIO4_IO22        0x14 /* SODIMM 
85 */
+                       MX7D_PAD_ECSPI2_SS0__GPIO4_IO23         0x14 /* SODIMM 
65 */
+                       MX7D_PAD_I2C3_SCL__GPIO4_IO12           0x14 /* SODIMM 
81 */
+                       MX7D_PAD_I2C3_SDA__GPIO4_IO13           0x14 /* SODIMM 
94 */
+                       MX7D_PAD_I2C4_SCL__GPIO4_IO14           0x14 /* SODIMM 
96 */
+                       MX7D_PAD_I2C4_SDA__GPIO4_IO15           0x14 /* SODIMM 
75 */
+                       MX7D_PAD_SD1_CD_B__GPIO5_IO0            0x74 /* SODIMM 
69 */
+                       MX7D_PAD_SD2_RESET_B__GPIO5_IO11        0x14 /* SODIMM 
98 */
+               >;
+       };
+
+       pinctrl_gpio3: gpio3grp { /* LCD 18-23 */
+               fsl,pins = <
+                       MX7D_PAD_LCD_DATA18__GPIO3_IO23         0x14 /* SODIMM 
136 */
+                       MX7D_PAD_LCD_DATA19__GPIO3_IO24         0x14 /* SODIMM 
138 */
+                       MX7D_PAD_LCD_DATA20__GPIO3_IO25         0x14 /* SODIMM 
140 */
+                       MX7D_PAD_LCD_DATA21__GPIO3_IO26         0x14 /* SODIMM 
142 */
+                       MX7D_PAD_LCD_DATA22__GPIO3_IO27         0x74 /* SODIMM 
144 */
+                       MX7D_PAD_LCD_DATA23__GPIO3_IO28         0x74 /* SODIMM 
146 */
+               >;
+       };
+
+       pinctrl_gpio4: gpio4grp { /* Alternatively CAN2 */
+               fsl,pins = <
+                       MX7D_PAD_GPIO1_IO14__GPIO1_IO14         0x14 /* SODIMM 
188 */
+                       MX7D_PAD_GPIO1_IO15__GPIO1_IO15         0x14 /* SODIMM 
178 */
+               >;
+       };
+
+       pinctrl_gpio7: gpio7grp { /* Alternatively CAN1 */
+               fsl,pins = <
+                       MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2     0x14 /* SODIMM 
63 */
+                       MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3     0x14 /* SODIMM 
55 */
+               >;
+       };
+
+       pinctrl_gpio_bl_on: gpioblongrp {
+               fsl,pins = <
+                       MX7D_PAD_SD1_WP__GPIO5_IO1              0x14 /* SODIMM 
71 */
+               >;
+       };
+
+       pinctrl_gpmi_nand: gpminandgrp {
+               fsl,pins = <
+                       MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B       0x71
+                       MX7D_PAD_SAI1_TX_DATA__NAND_READY_B     0x74
+                       MX7D_PAD_SD3_CLK__NAND_CLE              0x71
+                       MX7D_PAD_SD3_CMD__NAND_ALE              0x71
+                       MX7D_PAD_SD3_DATA0__NAND_DATA00         0x71
+                       MX7D_PAD_SD3_DATA1__NAND_DATA01         0x71
+                       MX7D_PAD_SD3_DATA2__NAND_DATA02         0x71
+                       MX7D_PAD_SD3_DATA3__NAND_DATA03         0x71
+                       MX7D_PAD_SD3_DATA4__NAND_DATA04         0x71
+                       MX7D_PAD_SD3_DATA5__NAND_DATA05         0x71
+                       MX7D_PAD_SD3_DATA6__NAND_DATA06         0x71
+                       MX7D_PAD_SD3_DATA7__NAND_DATA07         0x71
+                       MX7D_PAD_SD3_RESET_B__NAND_WE_B         0x71
+                       MX7D_PAD_SD3_STROBE__NAND_RE_B          0x71
+               >;
+       };
+
+       pinctrl_i2c1_int: i2c1intgrp { /* PMIC / TOUCH */
+               fsl,pins = <
+                       MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79
+               >;
+       };
+
+       pinctrl_i2c4: i2c4grp {
+               fsl,pins = <
+                       MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL      0x4000007f /* 
SODIMM 196 */
+                       MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA      0x4000007f /* 
SODIMM 194 */
+               >;
+       };
+
+       pinctrl_i2c4_recovery: i2c4-recoverygrp {
+               fsl,pins = <
+                       MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8     0x4000007f
+                       MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9     0x4000007f
+               >;
+       };
+
+       pinctrl_lcdif_dat: lcdifdatgrp {
+               fsl,pins = <
+                       MX7D_PAD_LCD_DATA00__LCD_DATA0          0x79 /* SODIMM 
76 */
+                       MX7D_PAD_LCD_DATA01__LCD_DATA1          0x79 /* SODIMM 
70 */
+                       MX7D_PAD_LCD_DATA02__LCD_DATA2          0x79 /* SODIMM 
60 */
+                       MX7D_PAD_LCD_DATA03__LCD_DATA3          0x79 /* SODIMM 
58 */
+                       MX7D_PAD_LCD_DATA04__LCD_DATA4          0x79 /* SODIMM 
78 */
+                       MX7D_PAD_LCD_DATA05__LCD_DATA5          0x79 /* SODIMM 
72 */
+                       MX7D_PAD_LCD_DATA06__LCD_DATA6          0x79 /* SODIMM 
80 */
+                       MX7D_PAD_LCD_DATA07__LCD_DATA7          0x79 /* SODIMM 
46 */
+                       MX7D_PAD_LCD_DATA08__LCD_DATA8          0x79 /* SODIMM 
62 */
+                       MX7D_PAD_LCD_DATA09__LCD_DATA9          0x79 /* SODIMM 
48 */
+                       MX7D_PAD_LCD_DATA10__LCD_DATA10         0x79 /* SODIMM 
74 */
+                       MX7D_PAD_LCD_DATA11__LCD_DATA11         0x79 /* SODIMM 
50 */
+                       MX7D_PAD_LCD_DATA12__LCD_DATA12         0x79 /* SODIMM 
52 */
+                       MX7D_PAD_LCD_DATA13__LCD_DATA13         0x79 /* SODIMM 
54 */
+                       MX7D_PAD_LCD_DATA14__LCD_DATA14         0x79 /* SODIMM 
66 */
+                       MX7D_PAD_LCD_DATA15__LCD_DATA15         0x79 /* SODIMM 
64 */
+                       MX7D_PAD_LCD_DATA16__LCD_DATA16         0x79 /* SODIMM 
57 */
+                       MX7D_PAD_LCD_DATA17__LCD_DATA17         0x79 /* SODIMM 
61 */
+               >;
+       };
+
+       pinctrl_lcdif_dat_24: lcdifdat24grp {
+               fsl,pins = <
+                       MX7D_PAD_LCD_DATA18__LCD_DATA18         0x79 /* SODIMM 
136 */
+                       MX7D_PAD_LCD_DATA19__LCD_DATA19         0x79 /* SODIMM 
138 */
+                       MX7D_PAD_LCD_DATA20__LCD_DATA20         0x79 /* SODIMM 
140 */
+                       MX7D_PAD_LCD_DATA21__LCD_DATA21         0x79 /* SODIMM 
142 */
+                       MX7D_PAD_LCD_DATA22__LCD_DATA22         0x79 /* SODIMM 
144 */
+                       MX7D_PAD_LCD_DATA23__LCD_DATA23         0x79 /* SODIMM 
146 */
+               >;
+       };
+
+       pinctrl_lcdif_ctrl: lcdifctrlgrp {
+               fsl,pins = <
+                       MX7D_PAD_LCD_CLK__LCD_CLK               0x79 /* SODIMM 
56 */
+                       MX7D_PAD_LCD_ENABLE__LCD_ENABLE         0x79 /* SODIMM 
44 */
+                       MX7D_PAD_LCD_HSYNC__LCD_HSYNC           0x79 /* SODIMM 
68 */
+                       MX7D_PAD_LCD_VSYNC__LCD_VSYNC           0x79 /* SODIMM 
82 */
+               >;
+       };
+
+       pinctrl_lvds_transceiver: lvdstx {
+               fsl,pins = <
+                       MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2     0x14 /* SODIMM 
63 */
+                       MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3     0x74 /* SODIMM 
55 */
+                       MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11    0x14 /* SODIMM 
99 */
+                       MX7D_PAD_EPDC_DATA13__GPIO2_IO13        0x14 /* SODIMM 
95 */
+               >;
+       };
+
+       pinctrl_pwm1: pwm1grp {
+               fsl,pins = <
+                       MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21        0x4  /* SODIMM 
59 */
+                       MX7D_PAD_GPIO1_IO08__PWM1_OUT           0x79 /* SODIMM 
59 */
+               >;
+       };
+
+       pinctrl_pwm2: pwm2grp {
+               fsl,pins = <
+                       MX7D_PAD_GPIO1_IO09__PWM2_OUT           0x79 /* SODIMM 
28 */
+               >;
+       };
+
+       pinctrl_pwm3: pwm3grp {
+               fsl,pins = <
+                       MX7D_PAD_GPIO1_IO10__PWM3_OUT           0x79 /* SODIMM 
30 */
+               >;
+       };
+
+       pinctrl_pwm4: pwm4grp {
+               fsl,pins = <
+                       MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20        0x4  /* SODIMM 
67 */
+                       MX7D_PAD_GPIO1_IO11__PWM4_OUT           0x79 /* SODIMM 
67 */
+               >;
+       };
+
+       pinctrl_uart1: uart1grp {
+               fsl,pins = <
+                       MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS    0x79 /* SODIMM 
25 */
+                       MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS    0x79 /* SODIMM 
27 */
+                       MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX    0x79 /* SODIMM 
35 */
+                       MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX    0x79 /* SODIMM 
33 */
+               >;
+       };
+
+       pinctrl_uart1_ctrl1: uart1ctrl1grp {
+               fsl,pins = <
+                       MX7D_PAD_SD2_DATA0__GPIO5_IO14          0x14 /* SODIMM 
23 / DTR */
+                       MX7D_PAD_SD2_DATA1__GPIO5_IO15          0x14 /* SODIMM 
31 / DCD */
+               >;
+       };
+
+       pinctrl_uart2: uart2grp {
+               fsl,pins = <
+                       MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS    0x79 /* SODIMM 
32 / CTS */
+                       MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS    0x79 /* SODIMM 
34 / RTS */
+                       MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX    0x79 /* SODIMM 
38 */
+                       MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX    0x79 /* SODIMM 
36 */
+               >;
+       };
+       pinctrl_uart3: uart3grp {
+               fsl,pins = <
+                       MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX    0x79 /* SODIMM 
21 */
+                       MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX    0x79 /* SODIMM 
19 */
+               >;
+       };
+
+       pinctrl_usbc_det: usbcdetgrp {
+               fsl,pins = <
+                       MX7D_PAD_ENET1_CRS__GPIO7_IO14          0x14 /* SODIMM 
137 / USBC_DET */
+               >;
+       };
+
+       pinctrl_usbh_reg: usbhreggrp {
+               fsl,pins = <
+                       MX7D_PAD_UART3_CTS_B__GPIO4_IO7         0x14 /* SODIMM 
129 / USBH_PEN */
+               >;
+       };
+
+       pinctrl_usdhc1: usdhc1grp {
+               fsl,pins = <
+                       MX7D_PAD_SD1_CLK__SD1_CLK               0x19 /* SODIMM 
47 */
+                       MX7D_PAD_SD1_CMD__SD1_CMD               0x59 /* SODIMM 
190 */
+                       MX7D_PAD_SD1_DATA0__SD1_DATA0           0x59 /* SODIMM 
192 */
+                       MX7D_PAD_SD1_DATA1__SD1_DATA1           0x59 /* SODIMM 
49 */
+                       MX7D_PAD_SD1_DATA2__SD1_DATA2           0x59 /* SODIMM 
51 */
+                       MX7D_PAD_SD1_DATA3__SD1_DATA3           0x59 /* SODIMM 
53 */
+               >;
+       };
+
+       pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
+               fsl,pins = <
+                       MX7D_PAD_SD1_CLK__SD1_CLK               0x1a
+                       MX7D_PAD_SD1_CMD__SD1_CMD               0x5a
+                       MX7D_PAD_SD1_DATA0__SD1_DATA0           0x5a
+                       MX7D_PAD_SD1_DATA1__SD1_DATA1           0x5a
+                       MX7D_PAD_SD1_DATA2__SD1_DATA2           0x5a
+                       MX7D_PAD_SD1_DATA3__SD1_DATA3           0x5a
+               >;
+       };
+
+       pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
+               fsl,pins = <
+                       MX7D_PAD_SD1_CLK__SD1_CLK               0x1b
+                       MX7D_PAD_SD1_CMD__SD1_CMD               0x5b
+                       MX7D_PAD_SD1_DATA0__SD1_DATA0           0x5b
+                       MX7D_PAD_SD1_DATA1__SD1_DATA1           0x5b
+                       MX7D_PAD_SD1_DATA2__SD1_DATA2           0x5b
+                       MX7D_PAD_SD1_DATA3__SD1_DATA3           0x5b
+               >;
+       };
+
+       /* Avoid backfeeding with removed card power. */
+       pinctrl_usdhc1_sleep: usdhc1-slpgrp {
+               fsl,pins = <
+                       MX7D_PAD_SD1_CMD__SD1_CMD               0x10
+                       MX7D_PAD_SD1_CLK__SD1_CLK               0x10
+                       MX7D_PAD_SD1_DATA0__SD1_DATA0           0x10
+                       MX7D_PAD_SD1_DATA1__SD1_DATA1           0x10
+                       MX7D_PAD_SD1_DATA2__SD1_DATA2           0x10
+                       MX7D_PAD_SD1_DATA3__SD1_DATA3           0x10
+               >;
+       };
+
+       pinctrl_usdhc3: usdhc3grp {
+               fsl,pins = <
+                       MX7D_PAD_SD3_CLK__SD3_CLK               0x19
+                       MX7D_PAD_SD3_CMD__SD3_CMD               0x59
+                       MX7D_PAD_SD3_DATA0__SD3_DATA0           0x59
+                       MX7D_PAD_SD3_DATA1__SD3_DATA1           0x59
+                       MX7D_PAD_SD3_DATA2__SD3_DATA2           0x59
+                       MX7D_PAD_SD3_DATA3__SD3_DATA3           0x59
+                       MX7D_PAD_SD3_DATA4__SD3_DATA4           0x59
+                       MX7D_PAD_SD3_DATA5__SD3_DATA5           0x59
+                       MX7D_PAD_SD3_DATA6__SD3_DATA6           0x59
+                       MX7D_PAD_SD3_DATA7__SD3_DATA7           0x59
+                       MX7D_PAD_SD3_STROBE__SD3_STROBE         0x19
+               >;
+       };
+
+       pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
+               fsl,pins = <
+                       MX7D_PAD_SD3_CLK__SD3_CLK               0x1a
+                       MX7D_PAD_SD3_CMD__SD3_CMD               0x5a
+                       MX7D_PAD_SD3_DATA0__SD3_DATA0           0x5a
+                       MX7D_PAD_SD3_DATA1__SD3_DATA1           0x5a
+                       MX7D_PAD_SD3_DATA2__SD3_DATA2           0x5a
+                       MX7D_PAD_SD3_DATA3__SD3_DATA3           0x5a
+                       MX7D_PAD_SD3_DATA4__SD3_DATA4           0x5a
+                       MX7D_PAD_SD3_DATA5__SD3_DATA5           0x5a
+                       MX7D_PAD_SD3_DATA6__SD3_DATA6           0x5a
+                       MX7D_PAD_SD3_DATA7__SD3_DATA7           0x5a
+                       MX7D_PAD_SD3_STROBE__SD3_STROBE         0x1a
+               >;
+       };
+
+       pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
+               fsl,pins = <
+                       MX7D_PAD_SD3_CLK__SD3_CLK               0x1b
+                       MX7D_PAD_SD3_CMD__SD3_CMD               0x5b
+                       MX7D_PAD_SD3_DATA0__SD3_DATA0           0x5b
+                       MX7D_PAD_SD3_DATA1__SD3_DATA1           0x5b
+                       MX7D_PAD_SD3_DATA2__SD3_DATA2           0x5b
+                       MX7D_PAD_SD3_DATA3__SD3_DATA3           0x5b
+                       MX7D_PAD_SD3_DATA4__SD3_DATA4           0x5b
+                       MX7D_PAD_SD3_DATA5__SD3_DATA5           0x5b
+                       MX7D_PAD_SD3_DATA6__SD3_DATA6           0x5b
+                       MX7D_PAD_SD3_DATA7__SD3_DATA7           0x5b
+                       MX7D_PAD_SD3_STROBE__SD3_STROBE         0x1b
+               >;
+       };
+
+       pinctrl_sai1: sai1grp {
+               fsl,pins = <
+                       MX7D_PAD_ENET1_COL__SAI1_TX_DATA0       0x30
+                       MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK     0x1f
+                       MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0    0x1f
+                       MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC     0x1f
+               >;
+       };
+
+       pinctrl_sai1_mclk: sai1mclkgrp {
+               fsl,pins = <
+                       MX7D_PAD_SAI1_MCLK__SAI1_MCLK           0x1f
+               >;
+       };
 };
 
 &iomuxc_lpsr {
-       pinctrl_i2c1: i2c1-grp {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_gpio_lpsr>;
+
+       pinctrl_cd_usdhc1: cdusdhc1grp {
+               fsl,pins = <
+                       MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0     0x59 /* SODIMM 
43 / MMC_CD */
+               >;
+       };
+
+       pinctrl_cd_usdhc1_sleep: cdusdhc1-slpgrp {
+               fsl,pins = <
+                       MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0     0x0
+               >;
+       };
+
+       pinctrl_gpio_lpsr: gpiolpsrgrp {
+               fsl,pins = <
+                       MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2     0x59 /* SODIMM 
135 */
+                       MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3     0x59 /* SODIMM 
22 */
+               >;
+       };
+
+       pinctrl_gpiokeys: gpiokeysgrp {
+               fsl,pins = <
+                       MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1     0x19 /* SODIMM 
45 / WAKE_UP */
+               >;
+       };
+
+       pinctrl_i2c1: i2c1grp {
                fsl,pins = <
-                       MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA      0x4000007f
                        MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL      0x4000007f
+                       MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA      0x4000007f
                >;
        };
 
-       pinctrl_i2c1_gpio: i2c1-gpio-grp {
+       pinctrl_i2c1_recovery: i2c1-recoverygrp {
                fsl,pins = <
-                       MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5     0x4000007f
                        MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4     0x4000007f
+                       MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5     0x4000007f
                >;
        };
 
-       pinctrl_cd_usdhc1: usdhc1-cd-grp {
+       pinctrl_uart1_ctrl2: uart1ctrl2grp {
                fsl,pins = <
-                       MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0     0x59 /* CD */
+                       MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6     0x14 /* SODIMM 
37 / RI */
+                       MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7     0x14 /* SODIMM 
29 / DSR */
                >;
        };
 };
diff --git a/arch/arm/dts/imx7d-colibri-emmc-eval-v3-u-boot.dtsi 
b/arch/arm/dts/imx7d-colibri-emmc-eval-v3-u-boot.dtsi
new file mode 120000
index 00000000000..0a28237d313
--- /dev/null
+++ b/arch/arm/dts/imx7d-colibri-emmc-eval-v3-u-boot.dtsi
@@ -0,0 +1 @@
+imx7d-colibri-eval-v3-u-boot.dtsi
\ No newline at end of file
diff --git a/arch/arm/dts/imx7d-colibri-emmc-eval-v3.dts 
b/arch/arm/dts/imx7d-colibri-emmc-eval-v3.dts
new file mode 100644
index 00000000000..6d505cb02aa
--- /dev/null
+++ b/arch/arm/dts/imx7d-colibri-emmc-eval-v3.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2017-2022 Toradex
+ */
+
+/dts-v1/;
+#include "imx7d-colibri-emmc.dtsi"
+#include "imx7-colibri-eval-v3.dtsi"
+
+/ {
+       model = "Toradex Colibri iMX7D 1GB (eMMC) on Colibri Evaluation Board 
V3";
+       compatible = "toradex,colibri-imx7d-emmc-eval-v3",
+                    "toradex,colibri-imx7d-emmc",
+                    "toradex,colibri-imx7d",
+                    "fsl,imx7d";
+};
+
+/* Colibri USBH */
+&usbotg2 {
+       status = "okay";
+};
diff --git a/arch/arm/dts/imx7d-colibri-emmc.dtsi 
b/arch/arm/dts/imx7d-colibri-emmc.dtsi
new file mode 100644
index 00000000000..2fb4d2133a1
--- /dev/null
+++ b/arch/arm/dts/imx7d-colibri-emmc.dtsi
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2017-2022 Toradex
+ */
+
+#include "imx7d.dtsi"
+#include "imx7-colibri.dtsi"
+
+/ {
+       aliases {
+               /* Required to properly pass MAC addresses from bootloader. */
+               ethernet0 = &fec1;
+               ethernet1 = &fec2;
+       };
+
+       memory@80000000 {
+               device_type = "memory";
+               reg = <0x80000000 0x40000000>;
+       };
+};
+
+&cpu1 {
+       cpu-supply = <&reg_DCDC2>;
+};
+
+&gpio6 {
+       gpio-line-names = "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "SODIMM_169",
+                         "SODIMM_157",
+                         "",
+                         "SODIMM_163",
+                         "SODIMM_77",
+                         "SODIMM_24",
+                         "",
+                         "SODIMM_25",
+                         "SODIMM_27",
+                         "SODIMM_32",
+                         "SODIMM_34";
+};
+
+/* Colibri USBH */
+&usbotg2 {
+       dr_mode = "host";
+       vbus-supply = <&reg_usbh_vbus>;
+};
+
+/* eMMC */
+&usdhc3 {
+       status = "okay";
+};
diff --git a/arch/arm/dts/imx7-colibri-u-boot.dtsi 
b/arch/arm/dts/imx7d-colibri-eval-v3-u-boot.dtsi
similarity index 79%
rename from arch/arm/dts/imx7-colibri-u-boot.dtsi
rename to arch/arm/dts/imx7d-colibri-eval-v3-u-boot.dtsi
index 91386476d55..1bf3f4a4aa7 100644
--- a/arch/arm/dts/imx7-colibri-u-boot.dtsi
+++ b/arch/arm/dts/imx7d-colibri-eval-v3-u-boot.dtsi
@@ -1,8 +1,14 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 /*
- * Copyright 2020 Toradex
+ * Copyright 2020-2022 Toradex
  */
 
+&{/aliases} {
+       /* SDHCI instance order: eMMC, SD/MMC */
+       mmc0 = &usdhc3;
+       mmc1 = &usdhc1;
+};
+
 &lcdif {
        status = "okay";
        pinctrl-names = "default";
diff --git a/arch/arm/dts/imx7d-colibri-eval-v3.dts 
b/arch/arm/dts/imx7d-colibri-eval-v3.dts
new file mode 100644
index 00000000000..c7a8b5aa240
--- /dev/null
+++ b/arch/arm/dts/imx7d-colibri-eval-v3.dts
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2016-2022 Toradex
+ */
+
+/dts-v1/;
+#include "imx7d-colibri.dtsi"
+#include "imx7-colibri-eval-v3.dtsi"
+
+/ {
+       model = "Toradex Colibri iMX7D on Colibri Evaluation Board V3";
+       compatible = "toradex,colibri-imx7d-eval-v3",
+                    "toradex,colibri-imx7d",
+                    "fsl,imx7d";
+};
+
+&ad7879_ts {
+       status = "okay";
+};
+
+/*
+ * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, 
PWM<C>, aka pwm2, pwm3.
+ * So if you enable following capacitive touch controller, disable pwm2/pwm3 
first.
+ */
+&atmel_mxt_ts {
+       status = "disabled";
+};
+
+&backlight {
+       status = "okay";
+};
+
+&lcdif {
+       status = "okay";
+};
+
+&panel_dpi {
+       status = "okay";
+};
+
+/* Colibri PWM<B> */
+&pwm2 {
+       /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for 
adapter. */
+       status = "okay";
+};
+
+/* Colibri PWM<C> */
+&pwm3 {
+       /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for 
adapter. */
+       status = "okay";
+};
+
+/* Colibri USBH */
+&usbotg2 {
+       status = "okay";
+};
diff --git a/arch/arm/dts/imx7d-colibri.dtsi b/arch/arm/dts/imx7d-colibri.dtsi
new file mode 100644
index 00000000000..531a45b176a
--- /dev/null
+++ b/arch/arm/dts/imx7d-colibri.dtsi
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2016-2022 Toradex
+ */
+
+#include "imx7d.dtsi"
+#include "imx7-colibri.dtsi"
+
+/ {
+       aliases {
+               /* Required to properly pass MAC addresses from bootloader. */
+               ethernet0 = &fec1;
+               ethernet1 = &fec2;
+       };
+
+       memory@80000000 {
+               device_type = "memory";
+               reg = <0x80000000 0x20000000>;
+       };
+};
+
+&cpu1 {
+       cpu-supply = <&reg_DCDC2>;
+};
+
+/* NAND */
+&gpmi {
+       status = "okay";
+};
+
+/* Colibri USBH */
+&usbotg2 {
+       dr_mode = "host";
+       vbus-supply = <&reg_usbh_vbus>;
+};
diff --git a/board/toradex/colibri_imx7/MAINTAINERS 
b/board/toradex/colibri_imx7/MAINTAINERS
index 24bec3ef14e..513679a41c8 100644
--- a/board/toradex/colibri_imx7/MAINTAINERS
+++ b/board/toradex/colibri_imx7/MAINTAINERS
@@ -3,12 +3,14 @@ M:    Marcel Ziswiler <marcel.ziswi...@toradex.com>
 W:     http://developer.toradex.com/software/linux/linux-software
 W:     https://www.toradex.com/community
 S:     Maintained
+F:     arch/arm/boot/dts/imx7-colibri.dtsi
+F:     arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+F:     arch/arm/boot/dts/imx7d-colibri.dtsi
+F:     arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
+F:     arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts
+F:     arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
 F:     board/toradex/colibri_imx7/
-F:     doc/board/toradex/colibri_imx7.rst
-F:     include/configs/colibri_imx7.h
 F:     configs/colibri_imx7_defconfig
 F:     configs/colibri_imx7_emmc_defconfig
-F:     arch/arm/dts/imx7-colibri.dtsi
-F:     arch/arm/dts/imx7-colibri-u-boot.dtsi
-F:     arch/arm/dts/imx7-colibri-emmc.dts
-F:     arch/arm/dts/imx7-colibri-rawnand.dts
+F:     doc/board/toradex/colibri_imx7.rst
+F:     include/configs/colibri_imx7.h
diff --git a/board/toradex/colibri_imx7/colibri_imx7.c 
b/board/toradex/colibri_imx7/colibri_imx7.c
index 486299b5e93..4f04543832e 100644
--- a/board/toradex/colibri_imx7/colibri_imx7.c
+++ b/board/toradex/colibri_imx7/colibri_imx7.c
@@ -207,7 +207,7 @@ int power_init_board(void)
        int ret;
 
 
-       ret = pmic_get("rn5t567@33", &dev);
+       ret = pmic_get("pmic@33", &dev);
        if (ret)
                return ret;
        ver = pmic_reg_read(dev, RN5T567_LSIVER);
@@ -241,7 +241,7 @@ void reset_cpu(void)
 {
        struct udevice *dev;
 
-       pmic_get("rn5t567@33", &dev);
+       pmic_get("pmic@33", &dev);
 
        /* Use PMIC to reset, set REPWRTIM to 0 and REPWRON to 1 */
        pmic_reg_write(dev, RN5T567_REPCNT, 0x1);
diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig
index 15dae6b3db9..fbc660eb4e9 100644
--- a/configs/colibri_imx7_defconfig
+++ b/configs/colibri_imx7_defconfig
@@ -5,7 +5,7 @@ CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x380000
 CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri-rawnand"
+CONFIG_DEFAULT_DEVICE_TREE="imx7d-colibri-eval-v3"
 CONFIG_TARGET_COLIBRI_IMX7=y
 CONFIG_IMX_RDC=y
 CONFIG_IMX_BOOTAUX=y
diff --git a/configs/colibri_imx7_emmc_defconfig 
b/configs/colibri_imx7_emmc_defconfig
index 361077ee84e..ea1aa4c3a64 100644
--- a/configs/colibri_imx7_emmc_defconfig
+++ b/configs/colibri_imx7_emmc_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYS_MALLOC_LEN=0x2000000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFDE00
 CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri-emmc"
+CONFIG_DEFAULT_DEVICE_TREE="imx7d-colibri-emmc-eval-v3"
 CONFIG_TARGET_COLIBRI_IMX7=y
 CONFIG_TARGET_COLIBRI_IMX7_EMMC=y
 CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
-- 
2.35.1

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