[PATCH 05/20] malta: Switch to using CONFIG_SYS_SDRAM_SIZE

[Tom Rini]

This is the only platform defining and using CONFIG_SYS_MEM_SIZE, switch
to using CONFIG_SYS_SDRAM_SIZE for consistency.

Cc: Paul Burton <paul.bur...@mips.com>
Signed-off-by: Tom Rini <tr...@konsulko.com>
---
 board/imgtec/malta/lowlevel_init.S | 4 ++--
 board/imgtec/malta/malta.c         | 2 +-
 include/configs/malta.h            | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/board/imgtec/malta/lowlevel_init.S 
b/board/imgtec/malta/lowlevel_init.S
index ecb4424fd92a..bed24972f7a8 100644
--- a/board/imgtec/malta/lowlevel_init.S
+++ b/board/imgtec/malta/lowlevel_init.S
@@ -118,7 +118,7 @@ _msc01:
        /* setup basic address decode */
        PTR_LI  t0, CKSEG1ADDR(MALTA_MSC01_BIU_BASE)
        li      t1, 0x0
-       li      t2, -CONFIG_SYS_MEM_SIZE
+       li      t2, -CONFIG_SYS_SDRAM_SIZE
        sw      t1, MSC01_BIU_MCBAS1L_OFS(t0)
        sw      t2, MSC01_BIU_MCMSK1L_OFS(t0)
        sw      t1, MSC01_BIU_MCBAS2L_OFS(t0)
@@ -168,7 +168,7 @@ _msc01:
        sw      t3, MSC01_PCI_SC2PIOMAPL_OFS(t0)
 
        /* setup PCI_BAR0 memory window */
-       li      t1, -CONFIG_SYS_MEM_SIZE
+       li      t1, -CONFIG_SYS_SDRAM_SIZE
        sw      t1, MSC01_PCI_BAR0_OFS(t0)
 
        /* setup PCI to SysCon/CPU translation */
diff --git a/board/imgtec/malta/malta.c b/board/imgtec/malta/malta.c
index d2e2e4ae2093..9853a0ba82f6 100644
--- a/board/imgtec/malta/malta.c
+++ b/board/imgtec/malta/malta.c
@@ -94,7 +94,7 @@ static enum sys_con malta_sys_con(void)
 
 int dram_init(void)
 {
-       gd->ram_size = CONFIG_SYS_MEM_SIZE;
+       gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
 
        return 0;
 }
diff --git a/include/configs/malta.h b/include/configs/malta.h
index c8b230ab21e9..98ea860655ea 100644
--- a/include/configs/malta.h
+++ b/include/configs/malta.h
@@ -30,7 +30,7 @@
 #else
 # define CONFIG_SYS_SDRAM_BASE         0x80000000
 #endif
-#define CONFIG_SYS_MEM_SIZE            (256 * 1024 * 1024)
+#define CONFIG_SYS_SDRAM_SIZE          0x10000000      /* 256 MiB */
 
 #define CONFIG_SYS_INIT_SP_OFFSET      0x400000
 
-- 
2.25.1