Hi Bryan,
On 28/03/23 12:10 am, Bryan Brattlof wrote:
> Update the uboot dtsi to enable DMA and CPSW at the uboot level
>
> Signed-off-by: Bryan Brattlof <b...@ti.com>
> ---
> arch/arm/dts/k3-am62a7-r5-sk.dts | 8 ++++++++
> arch/arm/dts/k3-am62a7-sk-u-boot.dtsi | 26 +++++++++++++++++++++++++-
> 2 files changed, 33 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/dts/k3-am62a7-r5-sk.dts
> b/arch/arm/dts/k3-am62a7-r5-sk.dts
> index 58b7c8ad050fd..ea2e202237556 100644
> --- a/arch/arm/dts/k3-am62a7-r5-sk.dts
> +++ b/arch/arm/dts/k3-am62a7-r5-sk.dts
> @@ -141,3 +141,11 @@
> status = "okay";
> u-boot,dm-spl;
> };
> +
> +&main_pktdma {
> + ti,sci = <&dm_tifs>;
> +};
> +
> +&main_bcdma {
> + ti,sci = <&dm_tifs>;
> +};
> diff --git a/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
> b/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
> index 7fc749ed70976..07ade7120cfe5 100644
> --- a/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
> +++ b/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
> @@ -15,7 +15,7 @@
> };
> };
>
> -&cbass_main{
> +&cbass_main {
> u-boot,dm-spl;
>
> timer1: timer@2400000 {
> @@ -138,3 +138,27 @@
> &vdd_mmc1 {
> u-boot,dm-spl;
> };
> +
> +&main_bcdma {
> + u-boot,dm-spl;
> +};
"u-boot,dm-spl" is now "bootph-pre-ram". The changes are present in -next.
For the existing DT source files, these have already been taken care of [0]
So please base on -next. Otherwise the series LGTM
[0] https://lore.kernel.org/all/20230213155641.1208774-4-...@chromium.org/
> +
> +&main_pktdma {
> + u-boot,dm-spl;
> +};
> +
> +&cpsw3g {
> + reg = <0x00 0x08000000 0x00 0x200000>,
> + <0x00 0x43000200 0x00 0x8>;
> + reg-names = "cpsw_nuss", "mac_efuse";
> + /delete-property/ ranges;
> + pinctrl-0 = <&main_mdio1_pins_default
> + &main_rgmii1_pins_default>;
> + u-boot,dm-spl;
> +
> + cpsw-phy-sel@04044 {
> + compatible = "ti,am64-phy-gmii-sel";
> + reg = <0x00 0x00104044 0x00 0x8>;
> + u-boot,dm-spl;
> + };
> +};
--
Regards,
Ravi
