U-Boot's definition for the I2C controllers did not contain any
clock information. This resulted in the I2C not functioning when
the U-Boot control FDT was passed to Linux.

Signed-off-by: Mathew McBride <m...@traverse.com.au>
---
 arch/arm/dts/fsl-ls1088a.dtsi | 76 ++++++++++++++++++++---------------
 1 file changed, 44 insertions(+), 32 deletions(-)

diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index 06237a58f4..bd344ba8e2 100644
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -212,6 +212,50 @@
                        #interrupt-cells = <2>;
                };
 
+               i2c0: i2c@2000000 {
+                       compatible = "fsl,vf610-i2c";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x0 0x2000000 0x0 0x10000>;
+                       interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(8)>;
+                       status = "disabled";
+               };
+
+               i2c1: i2c@2010000 {
+                       compatible = "fsl,vf610-i2c";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x0 0x2010000 0x0 0x10000>;
+                       interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(8)>;
+                       status = "disabled";
+               };
+
+               i2c2: i2c@2020000 {
+                       compatible = "fsl,vf610-i2c";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x0 0x2020000 0x0 0x10000>;
+                       interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(8)>;
+                       status = "disabled";
+               };
+
+               i2c3: i2c@2030000 {
+                       compatible = "fsl,vf610-i2c";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x0 0x2030000 0x0 0x10000>;
+                       interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(8)>;
+                       status = "disabled";
+               };
+
                pcie1: pcie@3400000 {
                        compatible = "fsl,ls1088a-pcie";
                        reg = <0x00 0x03400000 0x0 0x00100000>, /* controller 
registers */
@@ -413,38 +457,6 @@
                };
        };
 
-       i2c0: i2c@2000000 {
-               compatible = "fsl,vf610-i2c";
-               #address-cells = <1>;
-               #size-cells = <0>;
-               reg = <0x0 0x2000000 0x0 0x10000>;
-               interrupts = <0 34 4>;
-       };
-
-       i2c1: i2c@2010000 {
-               compatible = "fsl,vf610-i2c";
-               #address-cells = <1>;
-               #size-cells = <0>;
-               reg = <0x0 0x2010000 0x0 0x10000>;
-               interrupts = <0 34 4>;
-       };
-
-       i2c2: i2c@2020000 {
-               compatible = "fsl,vf610-i2c";
-               #address-cells = <1>;
-               #size-cells = <0>;
-               reg = <0x0 0x2020000 0x0 0x10000>;
-               interrupts = <0 35 4>;
-       };
-
-       i2c3: i2c@2030000 {
-               compatible = "fsl,vf610-i2c";
-               #address-cells = <1>;
-               #size-cells = <0>;
-               reg = <0x0 0x2030000 0x0 0x10000>;
-               interrupts = <0 35 4>;
-       };
-
        dspi: dspi@2100000 {
                compatible = "fsl,vf610-dspi";
                #address-cells = <1>;
-- 
2.30.1

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