This is for new platform enablement for agilex5.
Add cold, warm reset logic for new platform.
Signed-off-by: Jit Loon Lim <jit.loon....@intel.com>
---
drivers/sysreset/Kconfig | 7 ++++
drivers/sysreset/Makefile | 1 +
drivers/sysreset/sysreset_socfpga_agilex5.c | 44 +++++++++++++++++++++
3 files changed, 52 insertions(+)
create mode 100644 drivers/sysreset/sysreset_socfpga_agilex5.c
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index 03f7fdd597..850191eeed 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -137,6 +137,13 @@ config SYSRESET_SOCFPGA_SOC64
This enables the system reset driver support for Intel SOCFPGA
SoC64 SoCs.
+config SYSRESET_SOCFPGA_AGILEX5
+ bool "Enable support for Intel SOCFPGA AGILEX5 device"
+ depends on ARCH_SOCFPGA && TARGET_SOCFPGA_AGILEX5
+ help
+ This enables the system reset driver support for Intel SOCFPGA
+ AGILEX5 device.
+
config SYSRESET_TI_SCI
bool "TI System Control Interface (TI SCI) system reset driver"
depends on TI_SCI_PROTOCOL
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 40c876764a..6631a71db6 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
obj-$(CONFIG_SYSRESET_SBI) += sysreset_sbi.o
obj-$(CONFIG_SYSRESET_SOCFPGA) += sysreset_socfpga.o
obj-$(CONFIG_SYSRESET_SOCFPGA_SOC64) += sysreset_socfpga_soc64.o
+obj-$(CONFIG_SYSRESET_SOCFPGA_AGILEX5) += sysreset_socfpga_agilex5.o
obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o
obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
diff --git a/drivers/sysreset/sysreset_socfpga_agilex5.c
b/drivers/sysreset/sysreset_socfpga_agilex5.c
new file mode 100644
index 0000000000..7b05ffd269
--- /dev/null
+++ b/drivers/sysreset/sysreset_socfpga_agilex5.c
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 Intel Corporation <www.intel.com>
+ *
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <env.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/arch/reset_manager.h>
+#include <asm/system.h>
+
+static int socfpga_sysreset_request(struct udevice *dev,
+ enum sysreset_t type)
+{
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ATF)
+ const char *reset = env_get("reset");
+
+ if (reset && !strcmp(reset, "warm")) {
+ /* request a warm reset */
+ puts("Do warm reset now...\n");
+
+ /* doing architecture system reset */
+ psci_system_reset2(0, 0);
+ } else {
+ puts("Issuing cold reset REBOOT_HPS\n");
+ psci_system_reset();
+ }
+#endif
+
+ return -EINPROGRESS;
+}
+
+static struct sysreset_ops socfpga_sysreset = {
+ .request = socfpga_sysreset_request,
+};
+
+U_BOOT_DRIVER(sysreset_socfpga) = {
+ .id = UCLASS_SYSRESET,
+ .name = "socfpga_sysreset",
+ .ops = &socfpga_sysreset,
+};
--
2.26.2
