[PATCH 14/18] pinctrl: renesas: Synchronize R8A77990 E3 PFC tables with Linux 6.5.3

[Marek Vasut]

Synchronize R-Car R8A77990 E3 PFC tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+rene...@mailbox.org>
---
 drivers/pinctrl/renesas/pfc-r8a77990.c | 41 ++++++++++++++++----------
 1 file changed, 25 insertions(+), 16 deletions(-)

diff --git a/drivers/pinctrl/renesas/pfc-r8a77990.c 
b/drivers/pinctrl/renesas/pfc-r8a77990.c
index c6c3d0988b0..215a19ef9cd 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77990.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77990.c
@@ -26,12 +26,12 @@
        PORT_GP_CFG_18(0, fn, sfx, CFG_FLAGS), \
        PORT_GP_CFG_23(1, fn, sfx, CFG_FLAGS), \
        PORT_GP_CFG_26(2, fn, sfx, CFG_FLAGS), \
-       PORT_GP_CFG_12(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE | 
SH_PFC_PIN_CFG_DRIVE_STRENGTH), \
+       PORT_GP_CFG_12(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE_18_33 
| SH_PFC_PIN_CFG_DRIVE_STRENGTH), \
        PORT_GP_CFG_1(3, 12, fn, sfx, CFG_FLAGS), \
        PORT_GP_CFG_1(3, 13, fn, sfx, CFG_FLAGS), \
        PORT_GP_CFG_1(3, 14, fn, sfx, CFG_FLAGS), \
        PORT_GP_CFG_1(3, 15, fn, sfx, CFG_FLAGS), \
-       PORT_GP_CFG_11(4, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE | 
SH_PFC_PIN_CFG_DRIVE_STRENGTH), \
+       PORT_GP_CFG_11(4, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE_18_33 
| SH_PFC_PIN_CFG_DRIVE_STRENGTH), \
        PORT_GP_CFG_20(5, fn, sfx, CFG_FLAGS), \
        PORT_GP_CFG_9(6, fn, sfx, CFG_FLAGS), \
        PORT_GP_CFG_1(6, 9, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
@@ -60,7 +60,8 @@
        PIN_NOGP_CFG(TCK, "TCK", fn, SH_PFC_PIN_CFG_PULL_UP),           \
        PIN_NOGP_CFG(TDI, "TDI", fn, SH_PFC_PIN_CFG_PULL_UP),           \
        PIN_NOGP_CFG(TMS, "TMS", fn, SH_PFC_PIN_CFG_PULL_UP),           \
-       PIN_NOGP_CFG(TRST_N, "TRST_N", fn, SH_PFC_PIN_CFG_PULL_UP)
+       PIN_NOGP_CFG(TRST_N, "TRST_N", fn, SH_PFC_PIN_CFG_PULL_UP),     \
+       PIN_NOGP_CFG(VDDQ_AVB0, "VDDQ_AVB0", fn, 
SH_PFC_PIN_CFG_IO_VOLTAGE_25_33)
 
 /*
  * F_() : just information
@@ -511,7 +512,8 @@ MOD_SEL0_1_0
        FM(AVB_TD3) \
        FM(PRESETOUT_N) FM(FSCLKST_N) FM(TRST_N) FM(TCK) FM(TMS) FM(TDI) \
        FM(ASEBRK) \
-       FM(MLB_REF)
+       FM(MLB_REF) \
+       FM(VDDQ_AVB0)
 
 enum {
        PINMUX_RESERVED = 0,
@@ -5006,7 +5008,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = 
{
                MOD_SEL1_4
                /* RESERVED 3, 2, 1, 0  */ ))
        },
-       { },
+       { /* sentinel */ }
 };
 
 static const struct pinmux_drive_reg pinmux_drive_regs[] = {
@@ -5039,33 +5041,40 @@ static const struct pinmux_drive_reg 
pinmux_drive_regs[] = {
                { RCAR_GP_PIN(4,  9), 17, 2 },  /* SD3_DAT7 */
                { RCAR_GP_PIN(4, 10), 14, 2 },  /* SD3_DS */
        } },
-       { },
+       { /* sentinel */ }
 };
 
 enum ioctrl_regs {
        POCCTRL0,
+       POCCTRL2,
        TDSELCTRL,
 };
 
 static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
        [POCCTRL0] = { 0xe6060380, },
+       [POCCTRL2] = { 0xe6060388, },
        [TDSELCTRL] = { 0xe60603c0, },
-       { /* sentinel */ },
+       { /* sentinel */ }
 };
 
 static int r8a77990_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
 {
-       int bit = -EINVAL;
+       switch (pin) {
+       case RCAR_GP_PIN(3, 0) ... RCAR_GP_PIN(3, 11):
+               *pocctrl = pinmux_ioctrl_regs[POCCTRL0].reg;
+               return pin & 0x1f;
 
-       *pocctrl = pinmux_ioctrl_regs[POCCTRL0].reg;
+       case RCAR_GP_PIN(4, 0) ... RCAR_GP_PIN(4, 10):
+               *pocctrl = pinmux_ioctrl_regs[POCCTRL0].reg;
+               return (pin & 0x1f) + 19;
 
-       if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 11))
-               bit = pin & 0x1f;
+       case PIN_VDDQ_AVB0:
+               *pocctrl = pinmux_ioctrl_regs[POCCTRL2].reg;
+               return 0;
 
-       if (pin >= RCAR_GP_PIN(4, 0) && pin <= RCAR_GP_PIN(4, 10))
-               bit = (pin & 0x1f) + 19;
-
-       return bit;
+       default:
+               return -EINVAL;
+       }
 }
 
 static const struct pinmux_bias_reg pinmux_bias_regs[] = {
@@ -5273,7 +5282,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
                [30] = RCAR_GP_PIN(6,  9),      /* USB30_OVC */
                [31] = RCAR_GP_PIN(6, 17),      /* USB30_PWEN */
        } },
-       { /* sentinel */ },
+       { /* sentinel */ }
 };
 
 static const struct sh_pfc_soc_operations r8a77990_pfc_ops = {
-- 
2.40.1