On 2024-02-02 13:44, Quentin Schulz wrote:
OK so just tested this in Linux kernel 5.10 from Rockchip and v6.6.7
with some patches for rk3588 (and the jaguar dts). I ran the following
tests:
$ fio --filename=/dev/mmcblk0 --rw=read --direct=1 --name=fioBench
--bs=1M --ioengine=libaio --cmdprio_percentage=100
--output-format=json --allow_file_create=0 --time_based=1 --runtime=60
--ioscheduler=none
$ fio --filename=/dev/mmcblk0 --rw=write --direct=1 --name=fioBench
--bs=1M --ioengine=libaio --cmdprio_percentage=100
--output-format=json --allow_file_create=0 --time_based=1 --runtime=60
--ioscheduler=none;
It worked in HS200, HS400, HS400ES without any issue. It worked in
high-speed.
It was a bit "difficult" to get the kernel to switch to DDR52 because
even with the property gone from the DTB it would detect the card as
HS200. I had to comment out
https://elixir.bootlin.com/linux/latest/source/drivers/mmc/host/sdhci.c#L4558
to force it into DDR52 (or what I assume to be DDR52 :) the kernel
prints: "mmc0: new DDR MMC card at address 0001" ).
As a note, the mode selection has been buggy like that for a while.
Fixing that in the kernel drivers is already on my TODO list.
It failed reads in
that mode so didn't even test writes, but not sure if it's a fair test
with the aforementioned line commented out. I see it's also there in
the SDHCI implementation in U-Boot, so maybe it's just that mmc rescan
4 doesn't actually make much sense to test since I would assume it
would just detect it as HS200 even without the DT property? (or maybe
something really is missing there in the SDHCI logic?).
I couldn't quickly find out how to put the eMMC into non high-speed
mode so gave up on that.
