> -----邮件原件-----
> 发件人: Marek Vasut <[email protected]>
> 发送时间: 2025年10月30日 21:58
> 收件人: Alice Guo (OSS) <[email protected]>; [email protected]
> 抄送: Alice Guo <[email protected]>; Etienne Carriere
> <[email protected]>; Patrick Delaunay
> <[email protected]>; Peng Fan <[email protected]>; Tom Rini
> <[email protected]>; Vinh Nguyen <[email protected]>; Viorel
> Suman <[email protected]>; Ye Li <[email protected]>
> 主题: Re: 回复: 回复: [PATCH] firmware: scmi: Drop
> mmu_set_region_dcache_behaviour() misuse
> 
> On 10/30/25 4:58 AM, Alice Guo (OSS) wrote:
> 
> Hello Alice,
> 
> >>>> diff --git a/drivers/firmware/scmi/smt.c
> >>>> b/drivers/firmware/scmi/smt.c index
> >>>> 237871559f0..cd1c0801f72 100644
> >>>> --- a/drivers/firmware/scmi/smt.c
> >>>> +++ b/drivers/firmware/scmi/smt.c
> >>>> @@ -61,20 +61,6 @@ int scmi_dt_get_smt_buffer(struct udevice *dev,
> >>>> struct scmi_smt *smt)
> >>>>          if (device_is_compatible(dev, "arm,scmi") &&
> >>>> ofnode_has_property(dev_ofnode(dev), "mboxes"))
> >>>>                  scmi_smt_enable_intr(smt, true);
> >>>>
> >>>> -#ifdef CONFIG_ARM
> >>>> -        if (dcache_status()) {
> >>>> -                u32 align_size;
> >>>> -
> >>>> -                if (IS_ENABLED(CONFIG_ARM64))
> >>>> -                        align_size = PAGE_SIZE;
> >>>> -                else
> >>>> -                        align_size = MMU_SECTION_SIZE;
> >>>> -
> >>>> -
> >>>>
>       mmu_set_region_dcache_behaviour(ALIGN_DOWN((uintptr_t)smt->buf,
> >>>> align_size),
> >>>> -                                                ALIGN(smt->size, 
> >>>> align_size), DCACHE_OFF);
> >>>> -        }
> >>>> -#endif
> >>>> -
> >>>>          return 0;
> >>>>    }
> >>>>
> >>>> --
> >>>> 2.51.0
> >>>
> >>> Tested-by: Alice Guo <[email protected]>
> >>>
> >>> Tested on two boards: IMX94 and IMX95. No regressions were observed
> >> during boot. Looks good to me.
> >> Thank you !
> >
> > Hi Marek,
> >
> > Applied this patch on the U-Boot NXP tree and found that it affects the
> i.MX8ULP. On i.MX8ULP, the SCMI buffer is in SRAM and mapped as normal
> memory.
> 
> Thank you for testing, this helps greatly !
> 
> Would it be possible to fix up the SRAM mapping in:
> 
> arch/arm/mach-imx/imx8ulp/soc.c:static struct mm_region
> imx8ulp_arm64_mem_map[] = {
> 
> ?
> 
> --
> Best regards,
> Marek Vasut

Hi Marek,

Configuring the memory region for SCMI communication as MT_DEVICE_NGNRNE 
resolves the issue. With this change, SCMI works correctly and the i.MX8ULP 
boots successfully.

                /* SRAM0 (align with 2M) */
                .virt = 0x22000000UL,
                .phys = 0x22000000UL,
-               .size = 0x200000UL,
+               .size = 0x1f000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+                        PTE_BLOCK_OUTER_SHARE |
+                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               .virt = 0x2201f000UL,
+               .phys = 0x2201f000UL,
+               .size = 0x1000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                        PTE_BLOCK_NON_SHARE |
+                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               .virt = 0x22020000UL,
+               .phys = 0x22020000UL,
+               .size = 0x1e0000UL,
                .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
                         PTE_BLOCK_OUTER_SHARE |
                         PTE_BLOCK_PXN | PTE_BLOCK_UXN

Best regards,
Alice Guo

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