The rk3288 power-controller node contains an assigned-clocks property that conflicts with the bindings. From the git history it shows that they wanted to assign the rk3288 EDP_24M clock input centrally before an edp node was available. Move the edp assigned-clocks property to the edp node to reduce dtbs_check output.
Signed-off-by: Johan Jonker <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Heiko Stuebner <[email protected]> [ upstream commit: 10712ce694a67304a99dbba20f8cb146ca5f4fd6 ] (cherry picked from commit e1b4137b6bbc9998b13cde2eba0655cfdd358c69) --- dts/upstream/src/arm/rockchip/rk3288.dtsi | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/dts/upstream/src/arm/rockchip/rk3288.dtsi b/dts/upstream/src/arm/rockchip/rk3288.dtsi index 7e284b4fecdc..7477fc5da3ec 100644 --- a/dts/upstream/src/arm/rockchip/rk3288.dtsi +++ b/dts/upstream/src/arm/rockchip/rk3288.dtsi @@ -741,9 +741,6 @@ #address-cells = <1>; #size-cells = <0>; - assigned-clocks = <&cru SCLK_EDP_24M>; - assigned-clock-parents = <&xin24m>; - /* * Note: Although SCLK_* are the working clocks * of device without including on the NOC, needed for @@ -1193,6 +1190,8 @@ compatible = "rockchip,rk3288-dp"; reg = <0x0 0xff970000 0x0 0x4000>; interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; + assigned-clocks = <&cru SCLK_EDP_24M>; + assigned-clock-parents = <&xin24m>; clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>; clock-names = "dp", "pclk"; phys = <&edp_phy>; -- 2.39.5
