Re: [PATCH 02/10] arm: Update linker scripts to ensure appended device tree is aligned

[Fabio Estevam]

Hi Tom and Marek,

On Thu, Jan 22, 2026 at 11:23 AM Tom Rini <tr...@konsulko.com> wrote:

> We did that, yes. I'm not sure what Fabio is running in to here..

Let me share more information with you.

The board I am working on is based on Rockchip RV1103 (ARMv7) and will
submit it upstream soon.

The board was booting fin last week. Yesterday, after rebasing it
against the top of the tree U-Boot, the board no longer boots.

The boot error is:

Missing DTB
spl_early_init() failed: -2
### ERROR ### Please RESET the board ###

After running "git bisect", I found Tom's commit 8b0ebe054bb3 ("arm:
Update linker scripts to ensure appended device tree is aligned") to
be the guilty one.

If I partially revert the arm/cpu/u-boot-spl.lds change, as shown
below, the board boots again:

--- a/arch/arm/cpu/u-boot-spl.lds
+++ b/arch/arm/cpu/u-boot-spl.lds
@@ -51,9 +51,9 @@ SECTIONS
                __rel_dyn_start = .;
                *(.rel*)
                __rel_dyn_end = .;
-               . = ALIGN(8);
        }

+       . = ALIGN(8);
        _image_binary_end = .;
        _end = .;

With Tom's commit applied (failing case), the spl/u-boot-spl.map looks
like this:

.rel.dyn        0x0000000000015cac        0x4
                0x0000000000015cac                __rel_dyn_start = .
 *(.rel*)
 .rel.iplt      0x0000000000015cac        0x0 arch/arm/cpu/armv7/start.o
                0x0000000000015cac                __rel_dyn_end = .
                0x0000000000015cb0                . = ALIGN (0x8)
 *fill*         0x0000000000015cac        0x4
                0x0000000000015cb0                _image_binary_end = .
                0x0000000000015cb0                _end = .

With the partial revert above (booting case):

.rel.dyn        0x0000000000015cac        0x0
                0x0000000000015cac                __rel_dyn_start = .
 *(.rel*)
 .rel.iplt      0x0000000000015cac        0x0 arch/arm/cpu/armv7/start.o
                0x0000000000015cac                __rel_dyn_end = .
                0x0000000000015cb0                . = ALIGN (0x8)
                0x0000000000015cb0                _image_binary_end = .
                0x0000000000015cb0                _end = .

Basically, in the good case, .rel.dyn is zero. In the failing case:
.rel.dyn is 0x4 and *fill* is 0x4 as well.

This change messes with dtb being found in SPL.

What would be a proper fix?

Thanks