From: Fabio Estevam <[email protected]>
When CONFIG_SPL_SEPARATE_BSS is disabled, SPL expects the embedded device
tree to start exactly at __bss_end. This address is fixed by the linker
script and SPL probes this location directly for FDT_MAGIC at runtime.
Commit 8b0ebe054bb3 ("arm: Update linker scripts to ensure appended device
tree is aligned") modified the linker layout such that the
.binman_sym_table section may end at a non-word-aligned offset. Since no
alignment is enforced at the end of this section, the DTB is written a
few bytes past __bss_end in u-boot-spl.bin, even though the __bss_end
symbol itself remains correctly aligned and unchanged.
As a result, SPL reads zeroes at __bss_end instead of FDT_MAGIC, leading
to a "Missing DTB" failure, while the DTB is actually present at
__bss_end + 4.
Align the end of the .binman_sym_table section to 8 bytes so that the DTB
is placed exactly at __bss_end as expected.
This fixes SPL boot regressions observed on Rockchip RV1103 and RV1126.
Fixes: 8b0ebe054bb3 ("arm: Update linker scripts to ensure appended device tree
is aligned")
Signed-off-by: Fabio Estevam <[email protected]>
---
arch/arm/cpu/u-boot-spl.lds | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds
index d780a5060774..fc2b7fcb969f 100644
--- a/arch/arm/cpu/u-boot-spl.lds
+++ b/arch/arm/cpu/u-boot-spl.lds
@@ -40,6 +40,7 @@ SECTIONS
.binman_sym_table : {
__binman_sym_start = .;
KEEP(*(SORT(.binman_sym*)));
+ . = ALIGN(8);
__binman_sym_end = .;
}
--
2.34.1
