Hi Jonas, On 1/29/26 8:31 PM, Jonas Karlman wrote:
Rockchip RK356x supports up to 8 GiB DRAM, however U-Boot only includes the initial 4 GiB in its memory map, something that matches gd->ram_top
Does it? The first range is 0-0xf0000000 which is 3.75GiB and not 4GiB.
and current expected memory available for use in U-Boot. Add the remaining 4-8 GiB range to the memory map to more correctly describe available and addressable DRAM of RK356x. While at it also add the missing UL suffix to the PCIe address range for consistency. Signed-off-by: Jonas Karlman <[email protected]> --- arch/arm/mach-rockchip/rk3568/rk3568.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c index c2b96902d2dd..2b1eafee37c9 100644 --- a/arch/arm/mach-rockchip/rk3568/rk3568.c +++ b/arch/arm/mach-rockchip/rk3568/rk3568.c @@ -72,9 +72,15 @@ static struct mm_region rk3568_mem_map[] = { PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { - .virt = 0x300000000, - .phys = 0x300000000, - .size = 0x0c0c00000, + .virt = 0x100000000UL, + .phys = 0x100000000UL,
How do you know it starts there? I'm assuming from the ATAGS? If so, please state that in the commit log.
The previous mem region ends there but if you read the TRM, it should likely end at 0xFE8C0000 + 128KiB which is 0xfe8e0000. This only gives us an additional 23.125MiB which wouldn't be enough to explain the missing 0.25GiB we need to round this all to a nice 4/8GiB.
Cheers, Quentin
