Hi Quentin, On 1/30/2026 7:19 PM, Quentin Schulz wrote: > Hi Jonas, > > On 1/29/26 8:31 PM, Jonas Karlman wrote: >> Rockchip RK356x supports up to 8 GiB DRAM, however U-Boot only includes >> the initial 4 GiB in its memory map, something that matches gd->ram_top > > Does it? The first range is 0-0xf0000000 which is 3.75GiB and not 4GiB.
The 4 GiB here was more meant as the 32-bit 0-4 GiB addressable range. To be more exact the initial 3840 MiB out of 4 GiB DRAM can be reached at [0x0, 0xf0000000) and remaining 256 MiB at [0x1f0000000, 0x200000000). >> and current expected memory available for use in U-Boot. >> >> Add the remaining 4-8 GiB range to the memory map to more correctly >> describe available and addressable DRAM of RK356x. While at it also add >> the missing UL suffix to the PCIe address range for consistency. >> >> Signed-off-by: Jonas Karlman <[email protected]> >> --- >> arch/arm/mach-rockchip/rk3568/rk3568.c | 12 +++++++++--- >> 1 file changed, 9 insertions(+), 3 deletions(-) >> >> diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c >> b/arch/arm/mach-rockchip/rk3568/rk3568.c >> index c2b96902d2dd..2b1eafee37c9 100644 >> --- a/arch/arm/mach-rockchip/rk3568/rk3568.c >> +++ b/arch/arm/mach-rockchip/rk3568/rk3568.c >> @@ -72,9 +72,15 @@ static struct mm_region rk3568_mem_map[] = { >> PTE_BLOCK_NON_SHARE | >> PTE_BLOCK_PXN | PTE_BLOCK_UXN >> }, { >> - .virt = 0x300000000, >> - .phys = 0x300000000, >> - .size = 0x0c0c00000, >> + .virt = 0x100000000UL, >> + .phys = 0x100000000UL, > > How do you know it starts there? I'm assuming from the ATAGS? If so, > please state that in the commit log. This range matches the DRAM banks we add in U-Boot proper, it also matches some old dumps of rk356x ddr_mem tags I have at [1] and also seem to match the mem map used in latest vendor U-Boot. To me the commit message it quite clear, we only include 0-4 GiB (and pcie range) in current memory map and this adds the missing 4-8 GiB range, not sure how to phrase the commit message any clearer. > The previous mem region ends there but if you read the TRM, it should > likely end at 0xFE8C0000 + 128KiB which is 0xfe8e0000. This only gives > us an additional 23.125MiB which wouldn't be enough to explain the > missing 0.25GiB we need to round this all to a nice 4/8GiB. The rk356x only seem to be able to address up to 8 GiB so the the MIMO address space is most likely lost DRAM. That extra 23.125 MiB is probably not worth pursuing ;-) Below is a copy of the rk356x ddr_mem tags for 4 GiB and 8 GiB, please also see [2] for a dump of different rk3588 ddr_mem tags. count = 0x2 bank[0] = 0x0 bank[1] = 0x1f0000000 bank[2] = 0xf0000000 bank[3] = 0x10000000 count = 0x1 bank[0] = 0x0 bank[1] = 0x200000000 [1] https://gist.github.com/Kwiboo/6d983693c79365b43c330eb3191cbace [2] https://gist.github.com/Kwiboo/1c020d37e3adbc9d0d79dc003d921977 Regards, Jonas > > Cheers, > Quentin
