The PCIe0 instance of PCIe on the J722S SoC uses the 4 GB Address Window starting from 0x6_0000_0000 to map System Addresses to PCIe Bus Addresses. Hence, enable CONFIG_SYS_PCI_64BIT.
Signed-off-by: Siddharth Vadapalli <[email protected]> --- configs/j722s_evm_a53_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/j722s_evm_a53_defconfig b/configs/j722s_evm_a53_defconfig index e84670c75ed..dc4b6b93803 100644 --- a/configs/j722s_evm_a53_defconfig +++ b/configs/j722s_evm_a53_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y +CONFIG_SYS_PCI_64BIT=y CONFIG_PCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_BOOTSTD_FULL=y -- 2.51.1
