Calls to tlbwe and tlbsx should be preceded with an isync/msync pair.

Signed-off-by: Timur Tabi <ti...@freescale.com>
---
 arch/powerpc/cpu/mpc85xx/start.S |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index b5bf1fa..ccb331a 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -363,6 +363,8 @@ purge_old_ccsr_tlb:
 
        li      r1, 0
        mtspr   MAS6, r1        /* Search the current address space and PID */
+       isync
+       msync
        tlbsx   0, r8
        mfspr   r1, MAS1
        andis.  r2, r1, MAS1_VALID@h    /* Check for the Valid bit */
@@ -370,6 +372,8 @@ purge_old_ccsr_tlb:
 
        rlwinm  r1, r1, 0, 1, 31        /* Clear Valid bit */
        mtspr   MAS1, r1
+       isync
+       msync
        tlbwe
 1:
 
-- 
1.7.3.4


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