[U-Boot] [PATCH 08/11] MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores

[Daniel Schwierzeck]

Signed-off-by: Daniel Schwierzeck <daniel.schwierz...@googlemail.com>
---
 arch/mips/cpu/mips32/start.S |   21 +++++++++++++++++++--
 1 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
index b6cb4be..03cfd5a 100644
--- a/arch/mips/cpu/mips32/start.S
+++ b/arch/mips/cpu/mips32/start.S
@@ -206,11 +206,28 @@ _start:
        RVECENT(romReserved,125)
        RVECENT(romReserved,126)
        RVECENT(romReserved,127)
+       XVECENT(romExcHandle,0x400);
+       RVECENT(romReserved,129);
+       RVECENT(romReserved,130);
+       RVECENT(romReserved,131);
+       RVECENT(romReserved,132);
+       RVECENT(romReserved,133);
+       RVECENT(romReserved,134);
+       RVECENT(romReserved,135);
+       RVECENT(romReserved,136);
+       RVECENT(romReserved,137);
+       RVECENT(romReserved,138);
+       RVECENT(romReserved,139);
+       RVECENT(romReserved,140);
+       RVECENT(romReserved,141);
+       RVECENT(romReserved,142);
+       RVECENT(romReserved,143);
+       XVECENT(romExcHandle,0x480);    # bfc00480: EJTAG debug exception
 
        /*
         * We hope there are no more reserved vectors!
-        * 128 * 8 == 1024 == 0x400
-        * so this is address R_VEC+0x400 == 0xbfc00400
+        * 144 * 8 == 1152 == 0x480
+        * so this is address R_VEC+0x480 == 0xbfc00480
         */
        .align 4
 reset:
-- 
1.7.7.2

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