On Tue Jan 10, 2012 at 09:07:58PM +0100, Marek Vasut wrote: > > The current implementation invalidates the cache instead of flushing > > it. This causes problems on platforms where the spl/u-boot is already > > loaded to the RAM, with caches enabled by a first stage bootloader. > > What platforms are affected?
It is causing a problem on the hawkboard, where the spl is loaded directly to the RAM by a rom bootloader. We did not see this earlier since cpu_init_crit was not getting called due to CONFIG_SKIP_LOWLEVEL_INIT. -sughosh _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
