On 19.09.2012 23:02, Marek Vasut wrote:
and at the offset
+ * 0x40 ascii characters 'ECEC', secondly 1st stage
+ * loads code from flash into SDRAM at address 0xa0040000
+ * so all instructions which reinitializes memory
+ * controller have to be disabled.
+ */
+
+static inline void writelrb(uint32_t val, uint32_t addr)
Replace this with clrsetbits_le32()
I've copied writelrb and pxa2xx_dram_init from pxa2xx.c
and I think there is a reason why it's done that way and not by
clrsetbits_le32. But if you insist I can replace all calls to writelrb
by clrsetbits.
+{
+ writel(val, addr);
+ asm volatile("" : : : "memory");
+ readl(addr);
+ asm volatile("" : : : "memory");
+}
+
+static void h2200_pxa2xx_dram_init(void)
Why do you duplicate it ?!
[...]
Because code in pxa2xx.c disable and then re-enable memory.
And u-boot is executed from memory (1st stage bootloder
copied it there).
+
+# define CONFIG_USB_ETHER 1
+# define CONFIG_USBNET_DEV_ADDR "de:ad:be:ef:00:01"
+# define CONFIG_USBNET_HOST_ADDR "de:ad:be:ef:00:02"
Definitelly not, any mac address setting should not be present, Joe ?
So tell me how should I specify mac addresses? By EXTRA_ENV_SETTINGS?
Łukasz Dałek
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