From: Andre Heider <[email protected]>

Add the QSPI controller node and describe the attached SPI NOR flash
(Winbond W25Q64FWSSAQ).

Add a corresponding vendor flash partition layout.

Signed-off-by: Andre Heider <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Yixun Lan <[email protected]>

[ upstream commit: 735b1b205d07bf7bfa55b1f50f5485b9cc42a251 ]

(cherry picked from commit 30ccfd225cc1aa971a0748faefa14e735e49807c)
---
 dts/upstream/src/riscv/spacemit/k1-musepi-pro.dts | 50 +++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/dts/upstream/src/riscv/spacemit/k1-musepi-pro.dts 
b/dts/upstream/src/riscv/spacemit/k1-musepi-pro.dts
index b8e73eed8e62..74841cffd5f5 100644
--- a/dts/upstream/src/riscv/spacemit/k1-musepi-pro.dts
+++ b/dts/upstream/src/riscv/spacemit/k1-musepi-pro.dts
@@ -44,6 +44,15 @@
                regulator-boot-on;
                regulator-always-on;
        };
+
+       reg_qspi_vcc1v833: regulator-qspi-vcc1v833 {
+               compatible = "regulator-fixed";
+               regulator-name = "QSPI_VCC1833";
+               regulator-min-microvolt = <1833000>;
+               regulator-max-microvolt = <1833000>;
+               regulator-always-on;
+               vin-supply = <&buck4_3v3>;
+       };
 };
 
 &emmc {
@@ -239,6 +248,47 @@
        };
 };
 
+&qspi {
+       pinctrl-names = "default";
+       pinctrl-0 = <&qspi_cfg>;
+       status = "okay";
+
+       flash@0 {
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <26500000>;
+               spi-rx-bus-width = <4>;
+               spi-tx-bus-width = <4>;
+               vcc-supply = <&reg_qspi_vcc1v833>;
+               m25p,fast-read;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       bootinfo@0 {
+                               reg = <0x0 0x10000>;
+                       };
+                       private@10000 {
+                               reg = <0x10000 0x10000>;
+                       };
+                       fsbl@20000 {
+                               reg = <0x20000 0x40000>;
+                       };
+                       env@60000 {
+                               reg = <0x60000 0x10000>;
+                       };
+                       opensbi@70000 {
+                               reg = <0x70000 0x30000>;
+                       };
+                       uboot@a0000 {
+                               reg = <0xa0000 0x760000>;
+                       };
+               };
+       };
+};
+
 &uart0 {
        pinctrl-0 = <&uart0_2_cfg>;
        pinctrl-names = "default";

-- 
2.51.0

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