Hi Tom,
On 19/08/26 02:11, Tom Rini wrote:
On Tue, Aug 18, 2026 at 05:23:19PM +0530, Gokul Praveen wrote:
No-SPL Mode is a boot approach that bypasses
the A72 SPL while retaining U-Boot in the boot flow.
This mode provides faster boot times compared to normal boot
while maintaining U-Boot's flexibility for kernel loading
and system configuration..
v2<==> v1
===========
* Updated the naming convention used from "semi-falcon" to "no-spl".
* Link to v1:
https://lore.kernel.org/all/[email protected]/
Boot logs link :
https://gist.github.com/GokulPraveen2001/fef407a482e2dad30272006de557627c
Content-wise, this is fine. Naming wise, in v1 you explained that "No
SPL" (as I partly suggested) isn't right, because it's just the Cortex-A
SPL stage being skipped. So please, work on figuring out a better name
for this flow internally. Or be sure that everyone is really happy with
"no spl" being the name for the flow where you're skipping SPL on the
Cortex-A side, but still having it on the Cortex-R side. Thanks.
Yea, I discussed this internally and changed the naming to "A-core no SPL"
boot flow to make it more specific and clear.
I have submitted a v3 as well for the same.
Thanks and Best Regards
Gokul Praveen
