On Tue Aug 25, 2026 at 10:01 PM CEST, David Lechner wrote: > On 8/14/26 9:47 AM, Carlo Caione wrote: >> Enable the Genio 510 and Genio 700 SPL path entered by the external DDR >> loader at 0x40000000. Bind the raw SPL to the loader's 0xaf000-byte copy >> window, place BSS separately in DRAM, and retain the non-overlapping SPL >> malloc region. >> >> Use generic SPL MMC, GPT, FIT, and Arm Trusted Firmware support to load >> the firmware FIT from eMMC partition 1. Keep U-Boot proper at the shared >> MT8188 CONFIG_TEXT_BASE of 0x4c000000. >> >> The MediaTek BL31 used on these boards stalls when passed the runtime >> devicetree as its platform parameter. Enable SPL_ATF_NO_PLATFORM_PARAM >> so SPL can still use the tree to locate OP-TEE and U-Boot while passing >> NULL as the separate BL31 platform parameter. > > If we do another revision, it could be nice to explain where some more of > these parameters come from. For example, 0x400bb800 seem quite specific > like there would be a reason for it rather than a nice round number.
I'll fix the commit message in the next version. -- Carlo Caione
