Consistently indent the config header with tabs instead of a mix
of tabs and spaces. No functional change.

Signed-off-by: Marek Vasut <[email protected]>
---
Cc: "NXP i.MX U-Boot Team" <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: [email protected]
---
 include/configs/imx8mm_evk.h | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h
index 957d9c05083..36ee39746bd 100644
--- a/include/configs/imx8mm_evk.h
+++ b/include/configs/imx8mm_evk.h
@@ -11,33 +11,33 @@
 #include <asm/arch/imx-regs.h>
 
 #define UBOOT_ITB_OFFSET                       0x57C00
-#define FSPI_CONF_BLOCK_SIZE           0x1000
-#define UBOOT_ITB_OFFSET_FSPI  \
+#define FSPI_CONF_BLOCK_SIZE                   0x1000
+#define UBOOT_ITB_OFFSET_FSPI                  \
        (UBOOT_ITB_OFFSET + FSPI_CONF_BLOCK_SIZE)
 #ifdef CONFIG_FSPI_CONF_HEADER
-#define CFG_SYS_UBOOT_BASE  \
+#define CFG_SYS_UBOOT_BASE                     \
        (QSPI0_AMBA_BASE + UBOOT_ITB_OFFSET_FSPI)
 #else
-#define CFG_SYS_UBOOT_BASE     \
+#define CFG_SYS_UBOOT_BASE                     \
        (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 #endif
 
 #ifdef CONFIG_XPL_BUILD
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
-#define CFG_MALLOC_F_ADDR              0x930000
+#define CFG_MALLOC_F_ADDR                      0x930000
 /* For RAW image gives a error info not panic */
 
 #endif
 
 /* Link Definitions */
 
-#define CFG_SYS_INIT_RAM_ADDR        0x40000000
-#define CFG_SYS_INIT_RAM_SIZE        0x200000
+#define CFG_SYS_INIT_RAM_ADDR                  0x40000000
+#define CFG_SYS_INIT_RAM_SIZE                  0x200000
 
-#define CFG_SYS_SDRAM_BASE           0x40000000
-#define PHYS_SDRAM                      0x40000000
-#define PHYS_SDRAM_SIZE                        0x80000000 /* 2GB DDR */
+#define CFG_SYS_SDRAM_BASE                     0x40000000
+#define PHYS_SDRAM                             0x40000000
+#define PHYS_SDRAM_SIZE                                0x80000000      /* 2GB 
DDR */
 
-#define CFG_FEC_MXC_PHYADDR          0
+#define CFG_FEC_MXC_PHYADDR                    0
 
 #endif
-- 
2.53.0

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