Hi,

please pull these fixes to your tree.

Thanks,
Michal

The following changes since commit cc557af4553382f6f50e3ed62b9577054e7bc54f:

  configs: sc5xx: set default FDT file (2026-09-02 10:07:50 -0600)

are available in the Git repository at:

https://git.u-boot-project.org/u-boot/custodians/u-boot-amd.git tags/xilinx-for-v2026.10-rc4

for you to fetch changes up to 21114d5463956e31b18be0b199dd47f404696fc7:

fpga: xilinx: Check bitstream length against the supplied buffer (2026-09-04 12:44:20 +0200)

----------------------------------------------------------------
AMD/Xilinx fixes for v2026.10-rc3

AMD/Xilinx:
- MAINTAINERS fragment fixes

fpga:
- Check bitstream length against the supplied buffer

versal2:
- initialize num_banks variable in dram_init()
- move platform_id/platform_version to .data

versal-net:
- move platform_id/platform_version to .data

xilinx-spi:
- fix premature transfer termination at low SCK

----------------------------------------------------------------
Michal Simek (3):
      MAINTAINERS: Move u-boot-microblaze to u-boot-amd
      xilinx: Move u-boot-microblaze to u-boot-amd
      board: amd: versal2: move platform_id/platform_version to .data

Pranav Tilak (2):
      arm64: versal2: Initialize num_banks variable in dram_init()
      fpga: xilinx: Check bitstream length against the supplied buffer

Suraj Kakade (2):
      board: xilinx: versal-net: move platform_id/platform_version to .data
      spi: xilinx_spi: fix premature transfer termination at low SCK

 MAINTAINERS                         | 14 ++++++-------
 arch/arm/mach-versal-net/cpu.c      |  5 +++--
 arch/arm/mach-versal2/cpu.c         |  3 ++-
 board/amd/versal2/MAINTAINERS       |  2 +-
 board/amd/versal2/board.c           |  3 ++-
 board/xilinx/versal-net/MAINTAINERS |  2 +-
 board/xilinx/versal/MAINTAINERS     |  2 +-
 board/xilinx/zynq/MAINTAINERS       |  2 +-
 board/xilinx/zynqmp/MAINTAINERS     |  2 +-
 drivers/fpga/xilinx.c               |  9 +++++++++
 drivers/spi/xilinx_spi.c            | 21 +++++++++++++++++++-
 11 files changed, 48 insertions(+), 17 deletions(-)

--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP/Versal ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal/Versal NET SoCs
TF-A maintainer - Xilinx ZynqMP/Versal/Versal NET SoCs

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