When the MPFS SoC-level options were moved to the CPU Kconfig, the QSPI
implication was changed from MICROCHIP_COREQSPI to the undefined
MICROCHIP_QSPI symbol.
Restore the existing driver symbol so MPFS configurations can inherit the
same CoreQSPI capability that the board Kconfig previously implied.
The provider-less SIFIVE_CLINT options were removed separately in
12a9c83cba29. CoreQSPI instead has an in-tree driver and matching MPFS
DT nodes.
Fixes: 2f7420ccaacb ("riscv: mpfs: move SoC level options to the CPU Kconfig")
Signed-off-by: Pengpeng Hou <[email protected]>
---
arch/riscv/cpu/mpfs/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/cpu/mpfs/Kconfig b/arch/riscv/cpu/mpfs/Kconfig
index 8054313d182..3f0dca53665 100644
--- a/arch/riscv/cpu/mpfs/Kconfig
+++ b/arch/riscv/cpu/mpfs/Kconfig
@@ -28,4 +28,4 @@ config MICROCHIP_MPFS
imply MMC_HS200_SUPPORT
imply SPI
imply DM_SPI
- imply MICROCHIP_QSPI
+ imply MICROCHIP_COREQSPI
--
2.50.1 (Apple Git-155)
