- Add IO power domain control register programming via APBC block with ASAR unlocking for dual-voltage GPIO banks (3.3V/1.8V switching) - Fix drive strength configuration: use FIELD_PREP(), preserve io_type, return correct pin number, and remove redundant initialization - This patch set is split from the spacemit mmc: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Eric Chung <[email protected]> --- Changes in v2: - pinctrl: Add review tags. And update a few on coding style. - Link to v1: https://patch.msgid.link/[email protected] --- Eric Chung (2): pinctrl: k1: fix drive strength configuration pinctrl: k1: add IO power domain configuration support drivers/pinctrl/spacemit/pinctrl-k1.c | 109 +++++++++++++++++++++++++++++++--- 1 file changed, 102 insertions(+), 7 deletions(-) --- base-commit: 75df64103873fac09642860cedadaffb8cf6b2c7 change-id: 20260824-pinctrl-718fe50eb9f8 Best regards, -- Eric Chung <[email protected]>
