The SPI-NOR flash on the LeMans EVK is connected to SPI21 (QUPv3 wrapper 3, SE0) and routed to the SAIL hardware. The flash is used only by U-Boot during EDL or recovery flows and therefore is not described in the Linux device tree.
Describe the SPI-NOR flash in lemans-evk-u-boot.dtsi. Keep SPI21 disabled by default so that it does not affect the normal boot flow; the recovery flow enables the controller when required. Signed-off-by: Vandhiadevan Karunamoorthy <[email protected]> --- arch/arm/dts/lemans-evk-u-boot.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/dts/lemans-evk-u-boot.dtsi b/arch/arm/dts/lemans-evk-u-boot.dtsi index cdd3d32f61a..21733d8055e 100644 --- a/arch/arm/dts/lemans-evk-u-boot.dtsi +++ b/arch/arm/dts/lemans-evk-u-boot.dtsi @@ -17,3 +17,33 @@ <0x0 0xd3500000 0x0 0x2cb00000>; }; }; + +&tlmm { + qup_spi21_default: qup-spi21-state { + pins = "gpio13", "gpio14", "gpio15", "gpio16"; + function = "sail_top"; + drive-strength = <2>; + bias-disable; + }; +}; + +&{/aliases} { + spi0 = &spi21; +}; + +&qupv3_id_3 { + bootph-all; +}; + +&spi21 { + assigned-clocks = <&gcc GCC_QUPV3_WRAP3_S0_CLK>; + assigned-clock-rates = <48000000>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <48000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; --- base-commit: 9703d24aa2e5f2ca0793a47a25807eba53716792 change-id: 20260916-lemans-spi-nor-dts-4a1f7c02e938 Best regards, -- Vandhiadevan Karunamoorthy <[email protected]>
