On 10/22/26 2:20 PM, Mehmet Fide wrote:
Hi Marek,
On 2026-10-22, Marek Vasut wrote:
Mehmet, would it be possible to parse fsl,usbphy = <&usbphy0>; DT
property to arrive at the PHY node instead ?
Our mails crossed. 8/10 reaches the PHY node through fsl,usbphy already
(dev_read_phandle_with_args()); the alias only gave the index.
I think you might still need the portnr sequence number, or could you
get rid of that too ? (I would be fine with a follow up series too) ?
v9 needs it only to pick PLL3 or PLL7, and reads it from the clock of
the PHY (VF610_CLK_USBPHY0 or VF610_CLK_USBPHY1), as in my reply to
Krzysztof. Dropping it altogether means enabling that clock through a
clock driver, which U-Boot does not have for the VF610 yet; I would do
that in a follow-up series, together with dropping the
board_ehci_hcd_init() call no Vybrid board implements.
I am fine with minimizing the dependency and resolving it altogether in
a follow up series. Thanks !
