On Thu, Oct 29, 2026 at 03:57:46AM -0700, Abhilash V wrote:
> From: Aswin Murugan <[email protected]>
> 
> Make Qualcomm clock-driver selection phase-aware so SPL builds only the
> drivers it needs, reducing the SPL image size.
> 
> Signed-off-by: Abhilash V <[email protected]>
> Signed-off-by: Aswin Murugan <[email protected]>
> ---
>  drivers/clk/qcom/Kconfig  | 208 ++++++++++++++++++++++++++++++++++++++
>  drivers/clk/qcom/Makefile |  48 ++++-----
>  2 files changed, 232 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
> index aff3f5418a0..899f44cb8dc 100644
> --- a/drivers/clk/qcom/Kconfig
> +++ b/drivers/clk/qcom/Kconfig
> @@ -5,6 +5,11 @@ config CLK_QCOM
>       depends on CLK && DM_RESET && POWER_DOMAIN
>       def_bool n
>  
> +config SPL_CLK_QCOM
> +     bool
> +     depends on SPL_CLK && SPL_DM_RESET && SPL_POWER_DOMAIN
> +     def_bool n

Are you sure you need the def_bool n? I see you're copying CLK_QCOM but
I don't think that's needed either.

> +
>  menu "Qualcomm clock drivers"
>  
>  config CLK_QCOM_APQ8016
> @@ -15,6 +20,14 @@ config CLK_QCOM_APQ8016
>         on the Snapdragon APQ8016 SoC. This driver supports the clocks
>         and resets exposed by the GCC hardware block.
>  
> +config SPL_CLK_QCOM_APQ8016
> +     bool "Qualcomm APQ8016 GCC in SPL"
> +     depends on SPL_CLK
> +     select SPL_CLK_QCOM
> +     help
> +       SPL variant of CLK_QCOM_APQ8016.
> +       See the help of CLK_QCOM_APQ8016 for details.
> +
>  config CLK_QCOM_APQ8096
>       bool "Qualcomm APQ8096 GCC"
>       select CLK_QCOM
> @@ -23,6 +36,14 @@ config CLK_QCOM_APQ8096
>         on the Snapdragon APQ8096 SoC. This driver supports the clocks
>         and resets exposed by the GCC hardware block.
>  
> +config SPL_CLK_QCOM_APQ8096
> +     bool "Qualcomm APQ8096 GCC in SPL"
> +     depends on SPL_CLK
> +     select SPL_CLK_QCOM
> +     help
> +       SPL variant of CLK_QCOM_APQ8096.
> +       See the help of CLK_QCOM_APQ8096 for details.
> +
>  config CLK_QCOM_IPQ4019
>       bool "Qualcomm IPQ4019 GCC"
>       select CLK_QCOM
> @@ -206,6 +227,193 @@ config CLK_QCOM_X1E80100
>         on the Snapdragon X1E80100 SoC. This driver supports the clocks
>         and resets exposed by the GCC hardware block.
>  
> +config SPL_CLK_QCOM_IPQ4019
> +     bool "Qualcomm IPQ4019 GCC in SPL"
> +     depends on SPL_CLK
> +     select SPL_CLK_QCOM
> +     help
> +       Enable the Qualcomm IPQ4019 Global Clock Controller in SPL.
> +       This includes only the clock driver needed during early boot.
> +
> +config SPL_CLK_QCOM_IPQ5210
> +     bool "Qualcomm IPQ5210 GCC in SPL"
> +     depends on SPL_CLK
> +     select SPL_CLK_QCOM
> +     help
> +       Enable the Qualcomm IPQ5210 Global Clock Controller in SPL.
> +       This includes only the clock driver needed during early boot.

For readability you should keep these interspersed with the non-SPL
variant. And since there's such a backlog, the right thing to have done
would be to update what we have in drivers/clk/qcom/{Makefile,Kconfig}
to have SPL variants, and then add each as you go. So lets step back and
do that.

-- 
Tom

Attachment: signature.asc
Description: PGP signature

Reply via email to