On 2026-10-11T22:28:36, Jonas Karlman <[email protected]> wrote: > clk: rockchip: rk3528: Fix VOP clock configuration > > Setting rate of the VOP clocks never changes the clock parent and the > old divisor value is OR with new divisor value due to incorrect args > being passed to rk_clrsetreg() call. > > Use selector and divisor masks and values correctly in rk_clrsetreg() > call to ensure VOP clocks are configured as expected. > > Video is not supported for this SoC, so nothing is likely going to try > to change rate of VOP clocks until video support have been implemented. > > Fixes: 5a7a856b132f ("clk: rockchip: Add support for RK3528") > Signed-off-by: Jonas Karlman <[email protected]> > Reviewed-by: Quentin Schulz <[email protected]> > > drivers/clk/rockchip/clk_rk3528.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Simon Glass <[email protected]>
