qcom_parse_memory() set gd->ram_size to the span from the start of the first bank to the end of the last one, so that the relocation address computed in setup_ram_config() lands at the end of the highest bank. With sparse banks, such as 2 GiB below 4 GiB plus 2 GiB at 32 GiB, the DRAM line then reports '32 GiB (total 4 GiB)'.
Make gd->ram_size the sum of the bank sizes and provide the relocation address through board_get_usable_ram_top() instead, taking the end of the highest bank. Boards with a single bank are unchanged. On boards with holes between the banks, the values derived from gd->ram_size, such as bootm_size, now reflect the real amount of RAM. Signed-off-by: Vandhiadevan Karunamoorthy <[email protected]> --- arch/arm/mach-snapdragon/dram.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-snapdragon/dram.c b/arch/arm/mach-snapdragon/dram.c index 732e2bde2d2..af5e19960d9 100644 --- a/arch/arm/mach-snapdragon/dram.c +++ b/arch/arm/mach-snapdragon/dram.c @@ -20,6 +20,15 @@ static struct { phys_size_t size; } prevbl_ddr_banks[CONFIG_NR_DRAM_BANKS] __section(".data") = { 0 }; +/* End of the highest memory bank, U-Boot is relocated to just below it */ +static phys_addr_t qcom_ram_end __section(".data"); + +/* Override the generic helper, gd->ram_size no longer spans to the highest bank */ +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) +{ + return qcom_ram_end ?: gd->ram_top; +} + int dram_init(void) { /* @@ -198,6 +207,10 @@ static void qcom_parse_memory_dt(const fdt64_t *fdt, int *banks, phys_addr_t *ra * to correctly determine the relocation address for U-Boot is to parse all * memory regions and find the highest valid address. * + * gd->ram_size is set to the sum of the bank sizes, as the banks may be + * sparse. The relocation address is provided separately, as the end of the + * highest bank, by board_get_usable_ram_top(). + * * We can't use fdtdec_setup_memory_banksize() since it stores the result in * gd->bd, which is not yet allocated. * @@ -213,6 +226,7 @@ int qcom_parse_memory(const void *fdt, bool fdt_is_internal) { phys_addr_t ram_end = 0; int banks; + size_t i; qcom_memmap_source = fdt_is_internal ? QCOM_MEMMAP_SOURCE_INTERNAL_FDT : QCOM_MEMMAP_SOURCE_EXTERNAL_FDT; @@ -234,7 +248,10 @@ int qcom_parse_memory(const void *fdt, bool fdt_is_internal) qsort(prevbl_ddr_banks, banks, sizeof(prevbl_ddr_banks[0]), ddr_bank_cmp); gd->ram_base = prevbl_ddr_banks[0].start; - gd->ram_size = ram_end - gd->ram_base; + gd->ram_size = 0; + for (i = 0; i < ARRAY_SIZE(prevbl_ddr_banks); i++) + gd->ram_size += prevbl_ddr_banks[i].size; + qcom_ram_end = ram_end; return 0; } --- base-commit: d1d45c926a571fb6c1e6d7105c280833646915ea change-id: 20261105-dram-sum-banks-baea15fe7734 Best regards, -- Vandhiadevan Karunamoorthy <[email protected]>
