On Thu, Nov 05, 2026 at 05:45:26PM -0600, David Lechner wrote:

> Add MTK_DRAM_DESC_HANDOFF to stop in SPL if the boot stage that
> initializes the DRAM did not pass a transfer list with a devicetree
> overlay, and enable it on MT8189.
> 
> The overlay describes the DRAM size and the memory reserved for the DRAM
> controller, which depend on the DRAM fitted to the board. The devicetree
> built into U-Boot cannot describe them, so booting without the overlay
> would give the OS a wrong memory size and let it use reserved memory.
> 
> The option is not specific to MT8189. The DRAM initialization on MT8366
> has the same code to reserve memory for the DRAM controller, so the
> Genio 360 can use it as well once support for that is added later.
> 
> Signed-off-by: David Lechner <[email protected]>
[snip]
> +/*
> + * The boot stage that initializes the DRAM describes the DRAM size and the
> + * memory reserved for the DRAM controller with a devicetree overlay in a
> + * transfer list. The devicetree cannot describe them, so do not boot without
> + * the overlay.
> + */
> +static int mtk_dram_desc_check(void)
> +{
> +     if (!IS_ENABLED(CONFIG_MTK_DRAM_DESC_HANDOFF) ||
> +         !CONFIG_IS_ENABLED(BLOBLIST))
> +             return 0;
> +
> +     if (!(gd->flags & GD_FLG_BLOBLIST_HANDOFF) ||
> +         !bloblist_find(BLOBLISTT_FDT_OVERLAY, 0)) {
> +             printf("No DRAM description from the previous boot stage\n");
> +             return -ENOENT;
> +     }
> +
> +     return 0;
> +}
> +
>  void board_init_f(ulong dummy)
>  {
>       int ret;
> @@ -29,6 +56,10 @@ void board_init_f(ulong dummy)
>       ret = mtk_soc_early_init();
>       if (ret)
>               hang();
> +
> +     ret = mtk_dram_desc_check();
> +     if (ret)
> +             hang();

Can we simplify this to something along the lines of in board_init_f():
        if (IS_ENABLED(CONFIG_MTK_DRAM_DESC_HANDOFF) && mtk_dram_desc_check())
                hang();

And then mtk_dram_desc_check just does the bloblist check? This will
still get us the compile time sanity checking but a clearer path for
compiler optimization.

-- 
Tom

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