Hi Erwin, It's not my driver, it's Mike Lavender's. I see this in spi_coldfire.c, but I don't see delay_usecs being set anywhere.
/* Delay if requested at end of transfer*/ if (message->state == RUNNING_STATE) { previous = list_entry(transfer->transfer_list.prev, struct spi_transfer, transfer_list); if (drv_data->cs_control && transfer->cs_change)drv_data->cs_control(message->spi->chip_select, QSPI_CS_DROP);if (previous->delay_usecs) udelay(previous->delay_usecs); if (drv_data->cs_control && transfer->cs_change)drv_data->cs_control(message->spi->chip_select, QSPI_CS_ASSERT);}
I'll check with Mike. Cheers, Steve On 19/05/2007, at 6:06 AM, Erwin Authried wrote:
Hello Steve,does your driver take care about sending 8 clock cycles with deasserted CS at the end of a transaction so that DO is tristated? I think that the2.6 spi subsystem doesn't support sending clocks with deactivated chipselect. Regards, Erwin Am Freitag, den 18.05.2007, 14:24 +1000 schrieb Steve Bennett:Hi Greg, Likewise, a cleaned up version of the spi mmc patch. BTW You can ditch the MCF IPS driver patch I sent. I'll send a new version based on mmap at some point. Cheers, Steve_______________________________________________ uClinux-dev mailing list uClinux-dev@uclinux.org http://mailman.uclinux.org/mailman/listinfo/uclinux-dev This message was resent by uclinux-dev@uclinux.org To unsubscribe see: http://mailman.uclinux.org/mailman/options/uclinux-dev
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