The subject says it all.

Signed-off-by: Benedikt Spranger <[EMAIL PROTECTED]>
Signed-off-by: Sebastian Siewior <[EMAIL PROTECTED]>
--- 
Mixed up the frequency. This patch has been tested :)

--- a/arch/m68knommu/platform/coldfire/Makefile
+++ b/arch/m68knommu/platform/coldfire/Makefile
@@ -20,7 +20,7 @@ obj-$(CONFIG_COLDFIRE)        += dma.o entry.o 
 obj-$(CONFIG_M5206)    += timers.o
 obj-$(CONFIG_M5206e)   += timers.o
 obj-$(CONFIG_M520x)    += pit.o
-obj-$(CONFIG_M523x)    += pit.o
+obj-$(CONFIG_M523x)    += pit.o dma_timer.o
 obj-$(CONFIG_M5249)    += timers.o
 obj-$(CONFIG_M527x)    += pit.o
 obj-$(CONFIG_M5272)    += timers.o
--- /dev/null
+++ b/arch/m68knommu/platform/coldfire/dma_timer.c
@@ -0,0 +1,59 @@
+/*
+ * dma_timer.c -- Freescale ColdFire DMA Timer.
+ *
+ * Copyright (C) 2007, Benedikt Spranger <[EMAIL PROTECTED]>
+ */
+
+#include <linux/clocksource.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/jiffies.h>
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/timer.h>
+
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcfpit.h>
+#include <asm/mcfsim.h>
+
+#define DTMR0  MCF_IPSBAR + 0x400
+#define DTXMR0 MCF_IPSBAR + 0x402
+#define DTER0  MCF_IPSBAR + 0x403
+#define DTRR0  MCF_IPSBAR + 0x404
+#define DTCR0  MCF_IPSBAR + 0x408
+#define DTCN0  MCF_IPSBAR + 0x40c
+
+#define DMA_FREQ    ((MCF_CLK / 2) / 16)
+
+/*
+ *     By default use DMA Timer 0 as the system time source.
+ */
+cycle_t cf_dt_get_cycles(void)
+{
+       return __raw_readl(DTCN0);
+}
+
+static struct clocksource clocksource_cf_dt = {
+       .name           = "coldfire_dma_timer",
+       .rating         = 200,
+       .read           = cf_dt_get_cycles,
+       .mask           = CLOCKSOURCE_MASK(32),
+       .shift          = 20,
+       .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+static int __init  init_cf_dt_clocksource(void)
+{
+       __raw_writew(0x000d, DTMR0);
+       __raw_writeb(0x00, DTXMR0);
+       __raw_writeb(0x00, DTER0);
+       __raw_writel(0xffffffff, DTRR0);
+
+       clocksource_cf_dt.mult = clocksource_hz2mult(DMA_FREQ,
+                                                    clocksource_cf_dt.shift);
+       return clocksource_register(&clocksource_cf_dt);
+}
+
+arch_initcall(init_cf_dt_clocksource);
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