Thanks,
Allen
-----Original Message-----
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of Matt Waddel
Sent: Thursday, April 24, 2008 11:43 AM
To: uClinux development list
Subject: Re: [uClinux-dev] 2 partitions on M5329EVB NAND flash and
JFFS2doesn't work
Hi Allen,
NAND software didn't work in the earlier version of this BSP.
If you want to continue using the older version of this BSP
you should download the newer version and look at the changes
in:
drivers/mtd/nand/m5329.c &
arch/m68knommu/platform/532x/config.c
Regards,
Matt
Allen Yang wrote:
Hi, uClinux experts.
I am using Freescale M5329EVB and Freescale's uClinux BSP
(ltib-m532xevb-20061117).
I am trying to use 2 partitions on M5329EVB NAND flash. Each partition
has 8MB. I use the first 8MB with YAFFS file system for LogicLoader
bootloader. This partition has the whole uClinux image.
I use the second 8MB with JFFS2 file system for my application data.
It seems that I got the 2 partitions:
# cat /proc/mtd
dev: size erasesize name
mtd0: 002f0000 00001000 "ROMfs"
mtd1: 00800000 00004000 "M5329 NAND flash partition 1"
mtd2: 00800000 00004000 "M5329 NAND flash partition 2"
I am trying to use flash_erase to erase the second partition:
# /usr/bin/flash_erase /dev/mtd2
Erase Total 1 Units
Performing Flash Erase of length 16384 at offset 0x0 done
The output message is normal? If I use flash_eraseall to erase mtd2,
then the whole NAND flash (mtd1 and mtd2) will be erased. That's not
what I need. I want to keep the first partition (uClinux image)
untouched.
After I erased mtd2 with the above command, I tried to copy some files
to mtdblock2 and mount it. I got a lot of errors:
# mount -t jffs2 /dev/mtdblock2 /mnt
jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x00000000:
0x6246 instead
jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0000000c:
0x0001 instead
jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x00000010:
0x0002 instead
jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x00000014:
0x0002 instead
jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0000001c:
0x0002 instead
jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x00000028:
0x466d instead
jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x00000044:
0x9dce instead
jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x00000048:
0x205f instead
jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0000004c:
0x42a7 instead
jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x00000050:
0x0001 instead
Further such events for this erase block will not be printed
Empty flash at 0x00001264 ends at 0x00001268
Empty flash at 0x00001554 ends at 0x00001558
Empty flash at 0x000016b4 ends at 0x000016b8
Empty flash at 0x00001988 ends at 0x0000198c
I manually merged the following patch submitted by Andrea Tarani. But
it
still doesn't work.
Any body has any idea on what's happening?
Thanks in advance.
Allen
========================================================================
===
diff U3b
Z:/uClinux_linux-2.6.x_arch/m68knommu/platform/532x/config.c@@/main/anta
_EMV_Mod3/1
Z:/wipe/linux-2.6.x/arch/m68knommu/platform/532x/config.c@@/main/anta_EM
V_Mod3/2
---
Z:/uClinux_linux-2.6.x_arch/m68knommu/platform/532x/config.c@@/main/anta
_EMV_Mod3/1 Fri Sep 15 16:59:33 2006
+++
Z:/wipe/linux-2.6.x/arch/m68knommu/platform/532x/config.c@@/main/anta_EM
V_Mod3/2 Mon Oct 02 14:41:44 2006
@@ -47,6 +47,21 @@
/***********************************************************************
****/
+int sys_clk_khz = 0;
+int sys_clk_mhz = 0;
+
+void wtm_init(void);
+void scm_init(void);
+void gpio_init(void);
+void fbcs_init(void);
+void sdramc_init(void);
+int clock_pll (int fsys, int flags);
+int clock_limp (int);
+int clock_exit_limp (void);
+int get_sys_clock (void);
+
+/**********************************************************************
*****/
+
/*
* DMA channel base address table.
*/
@@ -91,6 +106,9 @@
void config_BSP(char *commandp, int size)
{
+ sys_clk_khz = get_sys_clock();
+ sys_clk_mhz = sys_clk_khz/1000;
+
mcf_setimr(MCFSIM_IMR_MASKALL);
#if defined(CONFIG_BOOTPARAM)
@@ -168,24 +186,9 @@
#define NAND_FLASH_ADDRESS (0xD0000000)
-int sys_clk_khz = 0;
-int sys_clk_mhz = 0;
-
-void wtm_init(void);
-void scm_init(void);
-void gpio_init(void);
-void fbcs_init(void);
-void sdramc_init(void);
-int clock_pll (int fsys, int flags);
-int clock_limp (int);
-int clock_exit_limp (void);
-int get_sys_clock (void);
asmlinkage void __init sysinit(void)
{
- sys_clk_khz = clock_pll(0, 0);
- sys_clk_mhz = sys_clk_khz/1000;
-
wtm_init();
scm_init();
gpio_init();
@@ -234,14 +237,14 @@
/* Initialize latch to drive signals to inactive states */
*((u16 *)(0x10080000)) = 0xFFFF;
- /* External SRAM */
- MCF_FBCS1_CSAR = EXT_SRAM_ADDRESS;
- MCF_FBCS1_CSCR = (MCF_FBCS_CSCR_PS_16
- | MCF_FBCS_CSCR_AA
- | MCF_FBCS_CSCR_SBM
- | MCF_FBCS_CSCR_WS(1));
- MCF_FBCS1_CSMR = (MCF_FBCS_CSMR_BAM_512K
- | MCF_FBCS_CSMR_V);
+// /* External SRAM */
+// MCF_FBCS1_CSAR = EXT_SRAM_ADDRESS;
+// MCF_FBCS1_CSCR = (MCF_FBCS_CSCR_PS_16
+// | MCF_FBCS_CSCR_AA
+// | MCF_FBCS_CSCR_SBM
+// | MCF_FBCS_CSCR_WS(1));
+// MCF_FBCS1_CSMR = (MCF_FBCS_CSMR_BAM_512K
+// | MCF_FBCS_CSMR_V);
/* Boot Flash connected to FBCS0 */
MCF_FBCS0_CSAR = FLASH_ADDRESS;
diff U3b
Z:/uClinux_linux-2.6.x_drivers/mtd/nand/m5329.c@@/main/anta_EMV_Mod3/1
Z:/wipe/linux-2.6.x/drivers/mtd/nand/m5329.c@@/main/anta_EMV_Mod3/2
---
Z:/uClinux_linux-2.6.x_drivers/mtd/nand/m5329.c@@/main/anta_EMV_Mod3/1
Fri Sep 15 17:48:45 2006
+++
Z:/wipe/linux-2.6.x/drivers/mtd/nand/m5329.c@@/main/anta_EMV_Mod3/2
Fri Sep 29 09:21:32 2006
@@ -36,6 +36,9 @@
/*
* Values specific to the SPIA board (used with EP7212 processor)
*/
+#define NAND_FLASH_CE ((u16 *)(0x10080000))
+#define NCE_LOW_VAL 0xfbfb
+#define NCE_HIGH_VAL 0xffff
#define NAND_FLASH_ADDRESS 0xd0000000 /* Fash address mapping */
#define CLE_ADDR_BIT 4
@@ -90,10 +93,12 @@
m5329_fio_base &= ~(1<<ALE_ADDR_BIT);
break;
case NAND_CTL_SETNCE:
- m5329_fio_base &= ~(1<<NCE_ADDR_BIT);
+ *NAND_FLASH_CE = NCE_LOW_VAL;
+// m5329_fio_base &= ~(1<<NCE_ADDR_BIT);
break;
case NAND_CTL_CLRNCE:
- m5329_fio_base |= 1<NCE_ADDR_BIT;
+ *NAND_FLASH_CE = NCE_HIGH_VAL;
+// m5329_fio_base |= 1<NCE_ADDR_BIT;
break;
}
/* Set address of NAND IO lines */
@@ -135,6 +140,8 @@
/* Link the private data with the MTD structure */
m5329_mtd->priv = this;
+
+ *NAND_FLASH_CE = NCE_HIGH_VAL;
/* Set address of NAND IO lines */
this->IO_ADDR_R = (void __iomem *) m5329_fio_base;
========================================================================
===
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