Jim Donelson wrote: > this pair of instructions are basically an atomic test-and-set on the > microblaze status register.
An atomic operation on some dedicated bits located in the "processor" rather than in memory. This is exactly what I intended to do for adding Futex to the NIOS2 arch. Adding such an instruction as a "custom instruction" to the NIOS2 Processor is quite easy and can be done by the customer when implementing his FPGA project. > We lobbied Xilinx to add these on the > grounds of the code size reduction: > > mfs rd, rmsr > andi rd, rd, ~2 > mts rmsr, rd > > becomes > > msrclr r0, ~2 > > to clear interrupts, and similarly for enable interrupts (and caches > too). Also you no longer need a scratch register when doing these > manipulations on the MSR. Would disabling / enabling the interrupt be possible in user mode (especially when running MMU enabled "full" Linux ? -Michael _______________________________________________ uClinux-dev mailing list uClinux-dev@uclinux.org http://mailman.uclinux.org/mailman/listinfo/uclinux-dev This message was resent by uclinux-dev@uclinux.org To unsubscribe see: http://mailman.uclinux.org/mailman/options/uclinux-dev
