On 02/06/2010 09:20 AM, Mike Frysinger wrote:
> On Friday 05 February 2010 01:23:28 Jie Zhang wrote:
>> gdbproxy does not work with the latest UrJTAG.
>
> how about this patch ? seems to work for me ...
I think the concept of "endianness" does not apply in JTAG. It is not
defined in the standard.
I prefer to "SHIFT_ORDER_STANDARD" and "SHIFT_ORDER_REVERSED". Or
"SHIFT_LSB_FIRST" and "SHIFT_MSB_FIRST".
Jie
> -mike
>
> --- include/urjtag/data_register.h
> +++ include/urjtag/data_register.h
> @@ -25,6 +25,7 @@
> #ifndef URJ_DATA_REGISTER_H
> #define URJ_DATA_REGISTER_H
>
> +#include "jtag.h"
> #include "types.h"
>
> #define URJ_DATA_REGISTER_MAXLEN 32
> @@ -38,13 +39,24 @@ struct URJ_DATA_REGISTER
> };
>
> urj_data_register_t *urj_part_data_register_alloc (const char *name, int
> len);
> +urj_data_register_t *urj_part_data_register_alloc_endian (const char *name,
> int len, urj_endian_t);
> void urj_part_data_register_free (urj_data_register_t *dr);
>
> /**
> - * allocate a data register and initialize the relevant<code>part</code>
> parts
> + * Allocate a big endian data register and initialize the relevant
> + *<code>part</code> parts.
> *
> * @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error
> */
> int urj_part_data_register_define (urj_part_t *part, const char *name, int
> len);
>
> +/**
> + * Allocate a data register with a specific endian and initialize the
> relevant
> + *<code>part</code> parts.
> + *
> + * @return URJ_STATUS_OK on success; URJ_STATUS_FAIL on error
> + */
> +int urj_part_data_register_define_endian (urj_part_t *part, const char *name,
> + int len, urj_endian_t endian);
> +
> #endif /* URJ_DATA_REGISTER_H */
> --- include/urjtag/tap_register.h
> +++ include/urjtag/tap_register.h
> @@ -25,6 +25,7 @@
> #ifndef URJ_TAP_REGISTER_H
> #define URJ_TAP_REGISTER_H
>
> +#include "jtag.h"
> #include "types.h"
> #include<stdint.h>
>
> @@ -33,9 +34,11 @@ struct URJ_TAP_REGISTER
> char *data; /* (public, r/w) register data */
> int len; /* (public, r/o) register length */
> char *string; /* (private) string representation of register data
> */
> + urj_endian_t endian;/* (private) endianness of the register */
> };
>
> urj_tap_register_t *urj_tap_register_alloc (int len);
> +urj_tap_register_t *urj_tap_register_alloc_endian (int len, urj_endian_t);
> urj_tap_register_t *urj_tap_register_duplicate (const urj_tap_register_t
> *tr);
> void urj_tap_register_free (urj_tap_register_t *tr);
> urj_tap_register_t *urj_tap_register_fill (urj_tap_register_t *tr, int val);
> --- src/tap/register.c
> +++ src/tap/register.c
> @@ -28,6 +28,7 @@
> #include<stdlib.h>
> #include<string.h>
>
> +#include<urjtag/jtag.h>
> #include<urjtag/error.h>
> #include<urjtag/log.h>
> #include<urjtag/tap_register.h>
> @@ -158,7 +159,7 @@ urj_tap_register_set_string (urj_tap_reg
> int
> urj_tap_register_set_value (urj_tap_register_t *tr, uint64_t val)
> {
> - unsigned int bit;
> + int i;
>
> if (val>> tr->len)
> {
> @@ -168,8 +169,12 @@ urj_tap_register_set_value (urj_tap_regi
> return URJ_STATUS_FAIL;
> }
>
> - for (bit = 0; bit< tr->len; ++bit)
> - tr->data[tr->len - 1 - bit] = !!(val& (1<< (tr->len - 1 - bit)));
> + if (tr->endian == URJ_ENDIAN_BIG)
> + for (i = 0; i< tr->len; ++i)
> + tr->data[tr->len - 1 - i] = (val>> (tr->len - 1 - i))& 1;
> + else
> + for (i = 0; i< tr->len; ++i)
> + tr->data[i] = (val>> (tr->len - 1 - i))& 1;
>
> return URJ_STATUS_OK;
> }
> @@ -191,22 +196,21 @@ urj_tap_register_get_string (const urj_t
> uint64_t
> urj_tap_register_get_value (const urj_tap_register_t *tr)
> {
> + uint64_t v;
> int i;
> - uint64_t l, b;
>
> if (!tr)
> return 0;
>
> - l = 0;
> - b = 1;
> - for (i = 0; i< tr->len; ++i)
> - {
> - if (tr->data[i]& 1)
> - l |= b;
> - b<<= 1;
> - }
> + v = 0;
> + if (tr->endian == URJ_ENDIAN_BIG)
> + for (i = tr->len - 1; i>= 0; --i)
> + v = (v<< 1) | tr->data[i];
> + else
> + for (i = 0; i< tr->len; ++i)
> + v = (v<< 1) | tr->data[i];
>
> - return l;
> + return v;
> }
>
> int
> --- src/cmd/cmd_register.c
> +++ src/cmd/cmd_register.c
> @@ -43,12 +43,13 @@ cmd_register_run (urj_chain_t *chain, ch
> {
> urj_part_t *part;
> long unsigned len;
> + urj_endian_t endian = URJ_ENDIAN_BIG;
>
> - if (urj_cmd_params (params) != 3)
> + if (urj_cmd_params (params)< 3 || urj_cmd_params (params)> 4)
> {
> urj_error_set (URJ_ERROR_SYNTAX,
> - "%s: #parameters should be %d, not %d",
> - params[0], 3, urj_cmd_params (params));
> + _("%s: #parameters should be %d to %d, not %d"),
> + params[0], 3, 4, urj_cmd_params (params));
> return URJ_STATUS_FAIL;
> }
>
> @@ -62,18 +63,29 @@ cmd_register_run (urj_chain_t *chain, ch
> if (urj_cmd_get_number (params[2],&len) != URJ_STATUS_OK)
> return URJ_STATUS_FAIL;
>
> - return urj_part_data_register_define (part, params[1], len);
> + if (urj_cmd_params (params) == 4)
> + {
> + endian = urj_endian_from_string (params[3]);
> + if (endian == URJ_ENDIAN_UNKNOWN)
> + {
> + urj_error_set (URJ_ERROR_SYNTAX, _("%s: invalid endian"),
> params[0]);
> + return URJ_STATUS_FAIL;
> + }
> + }
> +
> + return urj_part_data_register_define_endian (part, params[1], len,
> endian);
> }
>
> static void
> cmd_register_help (void)
> {
> urj_log (URJ_LOG_LEVEL_NORMAL,
> - _("Usage: %s NAME LENGTH\n"
> + _("Usage: %s NAME LENGTH [ENDIAN]\n"
> "Define new data register with specified NAME and LENGTH.\n"
> "\n"
> "NAME Data register name\n"
> - "LENGTH Data register length\n"),
> + "LENGTH Data register length\n"
> + "ENDIAN Data register endianness (default: Big
> Endian)\n"),
> "register");
> }
>
> --- src/part/data_register.c
> +++ src/part/data_register.c
> @@ -34,7 +34,8 @@
> #include<urjtag/error.h>
>
> urj_data_register_t *
> -urj_part_data_register_alloc (const char *name, int len)
> +urj_part_data_register_alloc_endian (const char *name, int len,
> + urj_endian_t endian)
> {
> urj_data_register_t *dr;
>
> @@ -79,6 +80,12 @@ urj_part_data_register_alloc (const char
> return dr;
> }
>
> +urj_data_register_t *
> +urj_part_data_register_alloc (const char *name, int len)
> +{
> + return urj_part_data_register_alloc_endian (name, len, URJ_ENDIAN_BIG);
> +}
> +
> void
> urj_part_data_register_free (urj_data_register_t *dr)
> {
> @@ -91,7 +98,8 @@ urj_part_data_register_free (urj_data_re
> }
>
> int
> -urj_part_data_register_define (urj_part_t *part, const char *name, int len)
> +urj_part_data_register_define_endian (urj_part_t *part, const char *name,
> + int len, urj_endian_t endian)
> {
> urj_data_register_t *dr;
>
> @@ -102,7 +110,7 @@ urj_part_data_register_define (urj_part_
> return URJ_STATUS_FAIL;
> }
>
> - dr = urj_part_data_register_alloc (name, len);
> + dr = urj_part_data_register_alloc_endian (name, len, endian);
> if (!dr)
> // retain error state
> return URJ_STATUS_FAIL;
> @@ -133,3 +141,9 @@ urj_part_data_register_define (urj_part_
>
> return URJ_STATUS_OK;
> }
> +
> +int
> +urj_part_data_register_define (urj_part_t *part, const char *name, int len)
> +{
> + return urj_part_data_register_define_endian (part, name, len,
> URJ_ENDIAN_BIG);
> +}
> --- data/analog/bf533/bf533
> +++ data/analog/bf533/bf533
> @@ -161,13 +161,13 @@ signal VROUT0
> register BSR 197
> register BR 1
> register DIR 32
> -register DBGSTAT 16
> -register DBGCTL 16
> -register EMUIR 32
> -register EMUIR64 64
> -register EMUDAT 32
> -register EMUDAT40 40
> -register EMUPC 32
> +register DBGSTAT 16 little
> +register DBGCTL 16 little
> +register EMUIR 32 little
> +register EMUIR64 64 little
> +register EMUDAT 32 little
> +register EMUDAT40 40 little
> +register EMUPC 32 little
>
> instruction length 5
>
> --- data/analog/bf506/bf506
> +++ data/analog/bf506/bf506
> @@ -82,13 +82,13 @@ signal VDDINT5
> register BSR 119
> register BR 1
> register DIR 32
> -register DBGSTAT 16
> -register DBGCTL 16
> -register EMUIR 32
> -register EMUIR64 64
> -register EMUDAT 32
> -register EMUDAT40 40
> -register EMUPC 32
> +register DBGSTAT 16 little
> +register DBGCTL 16 little
> +register EMUIR 32 little
> +register EMUIR64 64 little
> +register EMUDAT 32 little
> +register EMUDAT40 40 little
> +register EMUPC 32 little
>
> instruction length 5
>
> --- data/analog/bf561/bf561
> +++ data/analog/bf561/bf561
> @@ -235,13 +235,13 @@ signal GND_EXT18
> register BSR 355
> register BR 1
> register DIR 32
> -register DBGSTAT 16
> -register DBGCTL 16
> -register EMUIR 32
> -register EMUIR64 64
> -register EMUDAT 32
> -register EMUDAT40 40
> -register EMUPC 32
> +register DBGSTAT 16 little
> +register DBGCTL 16 little
> +register EMUIR 32 little
> +register EMUIR64 64 little
> +register EMUDAT 32 little
> +register EMUDAT40 40 little
> +register EMUPC 32 little
>
> instruction length 5
>
> --- data/analog/bf518/bf518
> +++ data/analog/bf518/bf518
> @@ -176,13 +176,13 @@ signal VDDMEM7
> register BSR 200
> register BR 1
> register DIR 32
> -register DBGSTAT 16
> -register DBGCTL 16
> -register EMUIR 32
> -register EMUIR64 64
> -register EMUDAT 32
> -register EMUDAT40 40
> -register EMUPC 32
> +register DBGSTAT 16 little
> +register DBGCTL 16 little
> +register EMUIR 32 little
> +register EMUIR64 64 little
> +register EMUDAT 32 little
> +register EMUDAT40 40 little
> +register EMUPC 32 little
>
> instruction length 5
>
> --- data/analog/bf527/bf527
> +++ data/analog/bf527/bf527
> @@ -290,13 +290,13 @@ signal AGND1
> register BSR 233
> register BR 1
> register DIR 32
> -register DBGSTAT 16
> -register DBGCTL 16
> -register EMUIR 32
> -register EMUIR64 64
> -register EMUDAT 32
> -register EMUDAT40 40
> -register EMUPC 32
> +register DBGSTAT 16 little
> +register DBGCTL 16 little
> +register EMUIR 32 little
> +register EMUIR64 64 little
> +register EMUDAT 32 little
> +register EMUDAT40 40 little
> +register EMUPC 32 little
>
> instruction length 5
>
> --- data/analog/bf537/bf537
> +++ data/analog/bf537/bf537
> @@ -183,13 +183,13 @@ signal VROUT0
> register BSR 261
> register BR 1
> register DIR 32
> -register DBGSTAT 16
> -register DBGCTL 16
> -register EMUIR 32
> -register EMUIR64 64
> -register EMUDAT 32
> -register EMUDAT40 40
> -register EMUPC 32
> +register DBGSTAT 16 little
> +register DBGCTL 16 little
> +register EMUIR 32 little
> +register EMUIR64 64 little
> +register EMUDAT 32 little
> +register EMUDAT40 40 little
> +register EMUPC 32 little
>
> instruction length 5
>
> --- data/analog/bf538/bf538
> +++ data/analog/bf538/bf538
> @@ -316,13 +316,13 @@ signal VROUT1
> register BSR 325
> register BR 1
> register DIR 32
> -register DBGSTAT 16
> -register DBGCTL 16
> -register EMUIR 32
> -register EMUIR64 64
> -register EMUDAT 32
> -register EMUDAT40 40
> -register EMUPC 32
> +register DBGSTAT 16 little
> +register DBGCTL 16 little
> +register EMUIR 32 little
> +register EMUIR64 64 little
> +register EMUDAT 32 little
> +register EMUDAT40 40 little
> +register EMUPC 32 little
>
> instruction length 5
>
> --- data/analog/bf548/bf548
> +++ data/analog/bf548/bf548
> @@ -401,13 +401,13 @@ signal USB_XI
> register BSR 636
> register BR 1
> register DIR 32
> -register DBGSTAT 16
> -register DBGCTL 16
> -register EMUIR 32
> -register EMUIR64 64
> -register EMUDAT 32
> -register EMUDAT40 40
> -register EMUPC 32
> +register DBGSTAT 16 little
> +register DBGCTL 16 little
> +register EMUIR 32 little
> +register EMUIR64 64 little
> +register EMUDAT 32 little
> +register EMUDAT40 40 little
> +register EMUPC 32 little
>
> instruction length 5
>
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